Superconducting three-terminal device and logic gates
AssigneeMassachusetts Institute of Technology
InventorsAdam N. McCaughan, Karl K. Berggren
Life of this patent
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Abstract
A three-terminal device that exhibits transistor-like functionality at cryogenic temperatures may be formed from a single layer of superconducting material. A main current-carrying channel of the device may be toggled between superconducting and normal conduction states by applying a control signal to a control terminal of the device. Critical-current suppression and device geometry are used to propagate a normal-conduction hotspot from a gate constriction across and along a portion of the main current-carrying channel. The three-terminal device may be used in various superconducting signal-processing circuitry.
Claims23
A dynamically programmable AND/OR logic gate comprising:
- two, three-terminal devices connected in parallel and arranged to be connected between a current bias source and a reference potential, wherein each three-terminal device comprises:
- a main current-carrying channel configured to be connected between the current bias source and the reference potential;
- a gate channel configured to receive a logic input signal and connected to the main current-carrying channel;
- and
- a low-resistance constriction formed in the gate channel proximal the main channel, wherein the constriction is configured to increase a gate current density,
- wherein the main current-carrying channel and the gate channel are configured to both be superconducting when in operation.
A method of operating a dynamically programmable AND/OR logic gate, the method comprising:
- applying a first bias current to two main current carrying channels of two superconducting, three-terminal devices connected in parallel in the programmable AND/OR logic gate;
- placing gate channels of the two superconducting, three-terminal devices in superconducting states;
- operating the AND/OR logic gate as an AND gate during application of the first bias current;
- applying a second bias current to the two main current carrying channels;
- and
- operating the AND/OR logic gate as an OR gate during application of the second bias current.
A logic inverter comprising:
- a first three-terminal device comprising a first main current-carrying channel configured to be connected between a current bias source and a main current-carrying terminal of a second superconducting device;
- a first gate channel of the first three-terminal device configured to receive a logic input signal and connected to the first main current-carrying channel;
- a constriction formed in the first gate channel proximal to the first main current-carrying channel;
- and
- a logic output terminal connected between the first three-terminal device and the second superconducting device.
Dependencies are inferred from the claim text.