Gate-tunable P-N heterojunction diode, and fabrication method and application of same

A gate-tunable p-n junction diode, comprising:

• a substrate;
• a first semiconductor layer formed of a first semiconductor having a first band gap, having a first portion and a second portion extending from the first portion, formed on the substrate;
• a second semiconductor layer formed of a second semiconductor having a second band gap, having a first portion and a second portion extending from the first portion, formed on the substrate, such that the second portion of the second semiconductor layer and the second portion of the first semiconductor layer are in directly contact and overlap with one another to define a vertically stacked heterojunction therewith;
• and
• a first electrode and a second electrode formed on the substrate, being in contact with the first portion of the first semiconductor layer and the first portion of the second semiconductor layer, respectively, such that the vertically stacked heterojunction is located between the first electrode and the second electrode,
• wherein each of the first band gap and the second band gap is greater than 0 eV;
• wherein one of the first semiconductor and the second semiconductor is an n-type semiconductor, and the other of the first semiconductor and the second semiconductor is a p-type semiconductor;
• wherein each of the first semiconductor layer and the second semiconductor layer has a monolayer thickness;
• and
• wherein the n-type semiconductor comprises molybdenum disulphide (MoS2) flakes, and the p-type semiconductor comprises single-walled carbon nanotubes (SWCNTs).

A heterojunction structure, comprising:

• a first semiconductor layer formed of a first semiconductor having a first band gap and a second semiconductor layer formed of a second semiconductor having a second band gap and being directly stacked on and in directly contact with the first semiconductor layer to define a vertically stacked heterojunction on a substrate,
• wherein each of the first band gap and the second band gap is greater than 0 eV;
• wherein one of the first semiconductor and the second semiconductor is an n-type semiconductor, and the other of the first semiconductor and the second semiconductor is a p-type semiconductor;
• wherein each of the first semiconductor layer and the second semiconductor layer is formed of an atomically thin semiconductor;
• and
• wherein the n-type semiconductor comprises molybdenum disulphide (MoS2) flakes, and the p-type semiconductor comprises single-walled carbon nanotubes (SWCNTs).

A heterojunction structure, comprising:

• a first semiconductor layer formed of a first semiconductor having a first band gap and a second semiconductor layer formed of a second semiconductor having a second band gap and being directly stacked on and in directly contact with the first semiconductor layer to define a vertically stacked heterojunction on a substrate,
• wherein each of the first band gap and the second band gap is greater than 0 eV;
• wherein one of the first semiconductor and the second semiconductor is an n-type semiconductor, and the other of the first semiconductor and the second semiconductor is a p-type semiconductor;
• wherein each of the first semiconductor layer and the second semiconductor layer is formed of an atomically thin semiconductor;
• wherein the substrate comprises a gate layer and an insulating layer formed on the gate layer, wherein the first semiconductor layer and the second first semiconductor layer are disposed on the insulating layer;
• wherein a ratio of a forward current to a reverse current of the heterojunction structure varies as a function of a gate voltage applied to the gate layer;
• and
• wherein electrical characteristics of the heterojunction structure are tunable with the applied gate voltage over a wide range of charge transport behavior ranging from insulating to rectifying with the forward-to-reverse bias current ratio exceeding 104.