# US 9,438,826 B2 · Pixel structure and reset scheme > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,438,826 B2 - Document ID: US9438826B2 - Status: Granted - Kind: B2 - Application number: 14/135,014 - Filed: 2013-12-19 - Published: 2014-06-26 - Granted: 2016-09-06 - Earliest claimed: 2012-12-20 - Assignees: Rambus Inc. - Applicants: Rambus Inc. - Inventors: Song Xue; Thomas Vogelsang - Web page: https://patentgrep.com/patent/US9438826B2 ## CPC - H04N 25/00: Circuitry of solid-state image sensors [SSIS]; Control thereof - H04N 25/46: by combining or binning pixels - H04N 25/616: involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling - H04N 25/75: Circuitry for providing, modifying or processing image signals from the pixel array - H04N 25/778: comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION ## Abstract An image sensor that includes a pixel array with image pixels with conditional reset circuitry. The pixels can be reset by a combination of row select and column reset signals, which implements the reset function while minimizing the number of extra signal lines. The pixels may also include pinned photodiodes. The manner in which the pinned photodiodes are used reduces noise and allows the quantization of the pixel circuits to be programmable. ## Claims ### Claim 1 A pixel circuit of an image sensor, comprising: at least one photodetecting section; a signal node coupled to the at least one photodetecting section; a reset element to reset the signal node; and a row-enabled switch to pass or not pass, depending on a state of a row signal, a column reset signal to the reset element. ### Claim 2 (depends on 1) The pixel circuit of claim 1, wherein the at least one photodetecting section comprises a photodiode, and wherein the signal node is electrically connected to the photodiode. ### Claim 3 (depends on 1) The pixel circuit of claim 1, wherein the signal node comprises a floating diffusion and the at least one photodetecting section comprises a first pinned photodiode and a first charge transfer gate coupled between the first pinned photodiode and the floating diffusion. ### Claim 4 (depends on 3) The pixel circuit of claim 3, wherein the at least one photodetecting section comprises a second pinned photodiode and a second charge transfer gate coupled between the second pinned photodiode and the floating diffusion, wherein the first and second charge transfer gates are operated by respective and separate charge transfer signals. ### Claim 5 (depends on 1) The pixel circuit of claim 1, wherein the reset element is coupled between a reference voltage and the signal node and resets the signal node by resetting a voltage of the signal node based on the reference voltage. ### Claim 6 (depends on 1) The pixel circuit of claim 1, further comprising an output stage having an input coupled to the signal node and generating an output signal responsive to a voltage of the signal node. ### Claim 7 (depends on 1) The pixel circuit of claim 1, wherein the reset element and the row-enabled switch are transistors. ### Claim 8 (depends on 1) The pixel circuit of claim 1, wherein the at least one photodetecting section, the signal node, the reset element, and the row-enabled switch are all in a same pixel, and wherein the row enabled switch receives the column reset signal via a column line that is connected to a pixel column of a pixel array, and receives the row signal via a row line that is connected to a pixel row of the pixel array, wherein the reset element resets the signal node responsive to the column reset signal passed to the reset element from the row enabled switch. ### Claim 9 An integrated-circuit image sensor comprising: row lines and column lines; a control circuit to generate row signals for the row lines and column reset signals for the column lines; and an array of pixel circuits each served by a respective one of the row lines and a respective one of the column lines, each pixel circuit comprising a reset element and a row-enabled switch to either pass or not pass, depending on a state of a corresponding row signal on the respective row line, a corresponding column reset signal on the respective column line to the reset element. ### Claim 10 (depends on 9) The sensor of claim 9, wherein the control circuit generates the row signals and the column reset signals to concurrently reset only a plurality of the pixel circuits served by a selected one of the row lines by asserting a single one of the row signals on the selected row line and concurrently asserting a plurality of the column reset signals. ### Claim 11 (depends on 9) The sensor of claim 9, wherein the control circuit generates the row signals and the column signals to concurrently reset only a plurality of the pixel circuits served by a selected one of the column lines by asserting a single one of the column signals on the selected column line and concurrently asserting a plurality of the row signals. ### Claim 12 (depends on 9) The sensor of claim 9, wherein the control circuit generates the row signals and the column signals to reset only a single pixel circuit of the array by asserting a single one of the row signals on a selected one of the row lines serving the single pixel circuit and concurrently asserting a single one of the column signals on a selected one of the column lines serving the single pixel circuit. ### Claim 13 (depends on 9) The sensor of claim 9, wherein the control circuit concurrently resets all of the pixel circuits in the array by asserting all of the row signals and concurrently asserting all of the column reset signals. ### Claim 14 A pixel circuit of an image sensor, comprising: a first photodetector; a signal node; a first charge transfer gate coupled between the first photodetector and the signal node to transfer charge carriers between the first photodetector and the signal node responsive to a first charge transfer signal; and a first row-enabled switch to pass or not pass, depending on a state of a row signal, the first charge transfer signal to the first charge transfer gate. ### Claim 15 (depends on 14) The pixel circuit of claim 14, wherein the first photodetector is a pinned photodiode and the signal node is a floating diffusion. ### Claim 16 (depends on 14) The pixel circuit of claim 14, further comprising: a second photodetector; a second charge transfer gate coupled between the second photodetector and the signal node to transfer charge carriers between the second photodetector and the signal node responsive to a second charge transfer signal; and a second row-enabled switch to pass or not pass, depending on a state of the row signal, the second charge transfer signal to the second charge transfer gate. ### Claim 17 (depends on 14) The pixel circuit of claim 14, further comprising a reset element to reset the signal node. ### Claim 18 (depends on 17) The pixel circuit of claim 17, wherein the reset element is coupled between a reference voltage and the signal node and resets the signal node by resetting a voltage of the signal node based on the reference voltage. ### Claim 19 (depends on 14) The pixel circuit of claim 14, further comprising an amplifier section having an input coupled to the signal node, the amplifier section amplifying changes in a signal node voltage caused by the transferred charge carriers to generate amplified changes in an output signal. ### Claim 20 (depends on 14) The pixel circuit of claim 14, wherein the first photodetector, the signal node, the first charge transfer gate, and the row-enabled switch are all in a same pixel, and wherein the row enabled switch receives the first charge transfer signal via a column line that is connected to a pixel column of a pixel array, and receives the row signal via a row line that is connected to a pixel row of the pixel array, wherein the first charge transfer gate transfers the charge carriers between the first photodetector and the signal node responsive to the first charge transfer signal passed to the first charge transfer gate from the row enabled switch.