# US 9,438,430 B2 · System and method for measuring current in hybrid power over ethernet architecture > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,438,430 B2 - Document ID: US9438430B2 - Status: Granted - Kind: B2 - Application number: 13/336,854 - Filed: 2011-12-23 - Published: 2013-06-27 - Granted: 2016-09-06 - Earliest claimed: 2011-12-23 - Assignees: Broadcom Corporation - Applicants: Marius Ionel Vladan - Inventors: Marius Ionel Vladan - Web page: https://patentgrep.com/patent/US9438430B2 ## CPC - H04L 12/10: Current supply arrangements - G06F 1/266: {Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips} - G01R 19/0092: {Measuring current only} - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) ## Abstract Systems and methods of measuring current in a power over Ethernet (PoE) system are provided. The PoE system includes an integrated circuit component having a controller, an internal transistor, a replica transistor, and an external transistor. Current in the system can be indirectly measured by enabling and disabling the transistors in known ways and then measuring the current through the replica transistor. The actual current in the system can be calculated based on the measured currents, thereby allowing for a PoE system that is capable of measuring current without a resistor in series with the external transistor. ## Claims ### Claim 1 A method of indirectly measuring a load current IL in a power over Ethernet (PoE) system that includes a first transistor, a second transistor, and a replica transistor M times smaller than at least one of the first and second transistors, the method comprising: enabling both the first and second transistors and measuring an initial-state current IR1 through the replica transistor; disabling at least one of the first and second transistors and measuring a final-state current IR2 through the replica transistor; calculating a current factor kI based on the initial-state current IR1 and the final-state current IR2; and calculating the load current IL based on a measured present current IRP in the replica transistor and the current factor kI. ### Claim 2 (depends on 1) The method of claim 1, wherein the current factor kI is calculated according to the following equation: k I = M * I R ⁢ ⁢ 1 I R ⁢ ⁢ 2 - I R ⁢ ⁢ 1 . Equation ⁢ ⁢ 1 ### Claim 3 (depends on 1) The method of claim 1, wherein the load current IL is calculated according to the following equation: IL=kI*IRP. ### Claim 4 (depends on 1) The method of claim 1, further comprising: repeating the step of calculating the load current IL until a difference between an initial load current ILO and the load current IL is greater than or equal to a predetermined value; and repeating the steps of enabling, disabling, and calculating the current factor kI. ### Claim 5 (depends on 1) The method of claim 1, further comprising: repeating the step of calculating the load current IL until a predetermined number of cycles has elapsed; and repeating the steps of enabling, disabling, and calculating the current factor KI. ### Claim 6 (depends on 1) The method of claim 1, further comprising: repeating the step of calculating the load current IL until a predetermined amount of time has elapsed; and repeating the steps of enabling, disabling, and calculating the current factor KI. ### Claim 7 (depends on 1) The method of claim 1, wherein the PoE system comprises an integrated circuit component and an external component and wherein the first transistor and the replica transistor form part of the integrated circuit component and the second transistor forms part of the external component. ### Claim 8 (depends on 1) The method of claim 1, wherein the replica transistor has a larger resistance than both the first and second transistors. ### Claim 9 (depends on 1) The method of claim 1, wherein at least one of corresponding gate voltages, corresponding drain voltages, or corresponding source voltages are the same for the first transistor and the replica transistor. ### Claim 10 A power over Ethernet (PoE) system, comprising: an integrated circuit component that includes a controller, a first transistor, and a replica transistor, wherein the first transistor is coupled between a load and a ground; and a second transistor directly coupled between the load and the ground, wherein the second transistor is external to the integrated circuit component, wherein the controller is configured to: enable the first and second transistors prior to measuring an initial-state current I R1 through the replica transistor, disable at least one of the first and second transistors and measure a final-state current IR2 through the replica transistor, calculate a current factor kI based on the initial-state current IR1 and the final-state current IR2, and calculate a load current IL based on a measured present current IRP in the replica transistor and the current factor kI. ### Claim 11 (depends on 10) The system of claim 10, wherein the current factor kI is calculated according to the following equation: k I = M * I R ⁢ ⁢ 1 I R ⁢ ⁢ 2 - I R ⁢ ⁢ 1 . Equation ⁢ ⁢ 1 ### Claim 12 (depends on 10) The system of claim 10, wherein the controller is further configured to calculate the load current IL according to the following equation: IL=kI*IRP. ### Claim 13 (depends on 10) The system of claim 10, wherein the controller is further configured to re-measure the present current IRP through the replica transistor and re-calculate the load current IL until a difference between an initial load current ILO and the load current IL is greater than or equal to a predetermined value, and then to re-enable at least one of the first and second transistors and re-measure the initial-state current IR1 through the replica transistor, re-disable at least one of the first and second transistors and re-measure the final-state current IR2 through the replica transistor, and re-calculate the current factor kI based on the re-measured initial-state and final-state currents. ### Claim 14 (depends on 10) The system of claim 10, wherein the controller is further configured to re-measure the present current IRP through the replica transistor and re-calculate the load current IL until a predetermined number of cycles has elapsed, and then to re-enable at least one of the first and second transistors and re-measure the initial-state current IR1 through the replica transistor, re-disable at least one of the first and second transistors and re-measure the final-state current IR2 through the replica transistor, and re-calculate the current factor kI based on the re-measured initial-state and final-state currents. ### Claim 15 (depends on 10) The system of claim 10, wherein the controller is further configured to re-measure the present current IRP through the replica transistor and re-calculate the load current IL until a predetermined amount of time has elapsed, and then to re-enable at least one of the first and second transistors and re-measure the initial-state current IR1 through the replica transistor, re-disable at least one of the first and second transistors and re-measure the final-state current IR2 through the replica transistor, and re-calculate the current factor kI based on the re-measured initial-state and final-state currents. ### Claim 16 (depends on 10) The system of claim 10, wherein the replica transistor has a larger resistance than both the first and second transistors. ### Claim 17 (depends on 10) The system of claim 10, wherein the integrated circuit component further comprises a voltage replicator circuit coupled between the first transistor and the replica transistor and configured to replicate a voltage at input terminals of the first and second transistors at an input terminal of the replica transistor.