# US 9,438,349 B2 · Optical module, line card and optical communications system

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- Number: US 9,438,349 B2
- Document ID: US9438349B2
- Status: Granted
- Kind: B2
- Application number: 14/560,878
- Filed: 2014-12-04
- Published: 2015-06-18
- Granted: 2016-09-06
- Earliest claimed: 2013-12-12
- Assignees: Huawei Technologies Co., Ltd.
- Applicants: Huawei Technologies Co., Ltd.
- Inventors: Yongdong Ma; Wei Xiong
- Web page: https://patentgrep.com/patent/US9438349B2

## CPC

- H04B 10/40: Transceivers
- G02B 6/4261: {Packages with mounting structures to be pluggable or detachable, e.g. having latches or rails}
- H04B: TRANSMISSION
- G02B: OPTICAL ELEMENTS, SYSTEMS OR APPARATUS

## Abstract

Embodiments of the present invention disclose an optical module, a line card and an optical communications system, which are used to implement that the optical module is used on a line card of different service rates, so as to reduce a development cost. The optical module includes: more than two male sockets are disposed, where the more than two male sockets are configured to plug-connect to female sockets disposed on a line card, and the line card is a line card of various different service rates; and the more than two male sockets include at least one first male socket, where the first male socket is configured according to the Multisource Agreement (MSA) for a dense wavelength division multiplexing (DWDM) optical module of a 100G service rate.

## Claims

### Claim 1

An optical module in an optical communications system comprising:
a quantity of N connectors, configured to interface with corresponding connectors of line cards having different service rates, wherein N is a positive integer larger or equal to 2;
wherein the N connectors comprise a first connector configured according to a Multisource Agreement (MSA) for a dense wavelength division multiplexing (DWDM) optical module of a 100G service rate, and each of remaining N−1 connectors comprises same quantity of pins as that of the first connector;
a processing chip, configured to enable the remaining N−1 connectors, to switch the optical communication system to a 2N−1×100G service mode.

### Claim 2 (depends on 1)

The optical module according to claim 1, wherein each of the remaining N−1 connectors further comprises:
a physical bus transmitting and receiving signal interface, a clock signal interface and a ground signal interface.

### Claim 3 (depends on 2)

The optical module according to claim 2, wherein each of the remaining N−1 connectors further comprises:
a power supply signal interface.

### Claim 4 (depends on 2)

The optical module according to claim 2, wherein:
the physical bus transmitting and receiving signal interface and the clock signal interface are disposed on a side adjacent to the first connector.

### Claim 5 (depends on 3)

The optical module according to claim 3, wherein:
the physical bus transmitting and receiving signal interface is configured as an OTL4.10 signal interface and the power supply signal interface is configured as a 12V power supply signal interface.

### Claim 6

A system, comprising at least one line card and an optical module, wherein:
the at least one line card having different service rates comprises at least two connectors, configured to interface with a quantity of N connectors on the optical module, wherein N is a positive integer larger or equal to 2; and
wherein the N connectors of the optical module comprise a first connector configured according to a Multisource Agreement (MSA) for a dense wavelength division multiplexing (DWDM) optical module of a 100G service rate, and each of remaining N−1 connectors comprises same quantity of pins as that of the first connector;
wherein the optical module comprises a processing chip, configured to enable the remaining N−1 connectors, to switch the optical communication system to a 2N−1×100G service mode.

### Claim 7 (depends on 6)

The system according to claim 6, wherein each of the remaining N−1connectors further comprises:
a physical bus transmitting and receiving signal interface, a clock signal interface and a ground signal interface.

### Claim 8 (depends on 7)

The system according to claim 7, wherein each of the remaining N−1connectors further comprises:
a power supply signal interface.

### Claim 9 (depends on 7)

The system according to claim 7, wherein:
the physical bus transmitting and receiving signal interface and the clock signal interface are disposed on a side adjacent to the first connector.

### Claim 10 (depends on 7)

The system according to claim 7, wherein:
the physical bus transmitting and receiving signal interface is configured as an OTL4.10 signal interface and the power supply signal interface is configured as a 12V power supply signal interface.