# US 9,438,236 B2 · Input/output driver circuit, integrated circuit and method therefor > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,438,236 B2 - Document ID: US9438236B2 - Status: Granted - Kind: B2 - Application number: 14/409,310 - Filed: 2012-07-06 - Published: 2015-06-25 - Granted: 2016-09-06 - Earliest claimed: 2012-07-06 - Assignees: Freescale Semiconductor, Inc. - Applicants: Michael Priel; Dan Kuzmin; Sergey Sofer - Inventors: Michael Priel; Dan Kuzmin; Sergey Sofer - Web page: https://patentgrep.com/patent/US9438236B2 ## CPC - H03K 19/017509: {Interface arrangements} - H03K 19/00384: {in field effect transistor circuits} - H03K 19/018521: {of complementary type, e.g. CMOS} - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract An input/output (IO) driver circuit is described. The IO buffer driver circuit comprises: at least one input for receiving an input signal and at least one output for providing at least one output signal; and a plurality of switches arranged to provide a variable voltage level between a low voltage value and a high voltage value to the at least one output. The at least one first switch of the plurality of switches is arranged to initiate a voltage change to an intermediate voltage level between the low voltage value and the high voltage value in a first time period. The at least one second switch of the plurality of switches is arranged to continue the voltage change to the low voltage value or the high voltage value in a second time period. ## Claims ### Claim 1 An input/output (IO) driver circuit comprising: at least one input for receiving an input signal and at least one output for providing at least one output signal; a plurality of switches arranged to provide a variable voltage level between a low voltage value and a high voltage value to the at least one output, wherein at least one first switch of the plurality of switches is arranged to initiate a voltage change to an intermediate voltage level between the low voltage value and the high voltage value in a first time period, wherein the voltage change to the intermediate voltage level is an increasing voltage change that is followed by a decreasing voltage change to a second different intermediate voltage level, and at least one second switch of the plurality of switches is arranged to continue the voltage change to the low voltage value or the high voltage value in a second time period. ### Claim 2 (depends on 1) The I/O driver circuit of claim 1 wherein the plurality of switches comprises two sets of switches such that the at least one first switch and the at least one second switch of the plurality of switches form at least part of a first set of switches that is turned ‘on’ whilst a second set of switches is turned ‘off’. ### Claim 3 (depends on 2) The I/O driver circuit of claim 2 wherein the first set of switches is arranged to initiate a voltage increase to the intermediate voltage level through turning ‘on’ of the at least one first switch and thereafter to continue the voltage change to the high voltage value through turning ‘on’ of the at least one second switch. ### Claim 4 (depends on 3) The I/O driver circuit of claim 3 wherein the second set of switches is arranged to initiate a voltage decrease to an intermediate voltage level and thereafter to continue the voltage change to the low voltage value. ### Claim 5 (depends on 1) The I/O driver circuit of claim 1 wherein the at least one first switch is either a weak pull-up switch or a weak pull-down switch that is driven on less hard than a respective at least one pull-up second switch or pull-down second switch. ### Claim 6 (depends on 1) The I/O driver circuit of claim 1 wherein the at least one first switch is arranged to initiate the voltage change to the intermediate voltage level that resides in a vicinity of a threshold voltage level. ### Claim 7 (depends on 1) The I/O driver circuit of claim 1 wherein the first time period is different to the second time period. ### Claim 8 (depends on 1) The I/O driver circuit of claim 1 wherein the first time period does not overlap the second time period. ### Claim 9 (depends on 1) The I/O driver circuit of claim 1 wherein the first time period overlaps the second time period. ### Claim 10 (depends on 1) The I/O driver circuit of claim 1 further comprising a control circuit operably coupled to a timer circuit arranged to ensure that at least one of the following conditions exist: that the first time period is different to the second time period, that the first time period does not overlap the second time period. ### Claim 11 (depends on 1) The I/O driver circuit of claim 1 wherein the plurality of switches comprise a plurality of transistors arranged to enable timing controllable termination of the I/O driver circuit. ### Claim 12 (depends on 1) An integrated circuit comprising the I/O driver circuit of claim 1. ### Claim 13 An input/output (IO) driver circuit comprising: at least one input for receiving an input signal and at least one output for providing at least one output signal; and a plurality of switches arranged to provide a variable voltage level between a low voltage value and a high voltage value to the at least one output, wherein a first switch of the plurality of switches is arranged to initiate a voltage change to a first intermediate voltage level in a first intermediate time period, a second switch of the plurality of switches is arranged to initiate a voltage change to a second intermediate voltage level in a second intermediate time period, and at least one third switch of the plurality of switches is arranged to continue the voltage change to the low voltage value or the high voltage value in a third intermediate time period. ### Claim 14 (depends on 13) The I/O driver circuit of claim 13 wherein the first switch is either a weak pull-up switch or a weak pull-down switch that is driven on less hard than a respective pull-up second switch or pull-down second switch. ### Claim 15 (depends on 13) The I/O driver circuit of claim 13 wherein the first switch is arranged to initiate the voltage change to the first intermediate voltage level that resides in a vicinity of a threshold voltage level. ### Claim 16 A method of providing an output for an input/output driver circuit comprising a plurality of switches arranged to provide a variable voltage level between a low voltage value and a high voltage value, the method comprising: applying a first variable input signal to at least one first switch of the plurality of switches thereby initiating a voltage change output from the input/output driver circuit to a first intermediate voltage level between the low voltage value and the high voltage value in a first time period; applying a second variable input signal to at least one second switch of the plurality of switches thereby continuing the voltage change in a second time period; applying a third variable input signal to at least one third switch of the plurality of switches thereby initiating a voltage change to a second intermediate voltage level in a second intermediate time period prior to applying the second variable input signal to the at least one second switch; and outputting the low voltage value or the high voltage value from the input/output driver circuit. ### Claim 17 (depends on 16) The method of claim 16 wherein the voltage change to an intermediate voltage level comprising: initiating an increasing voltage change that is followed by a decreasing voltage change to a second different intermediate voltage level. ### Claim 18 (depends on 16) The method of claim 16 wherein the at least one first switch is either a weak pull-up switch or a weak pull-down switch that is driven on less hard than a respective at least one pull-up second switch or pull-down second switch.