# US 9,438,235 B2 · Gate driver and related circuit buffer > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,438,235 B2 - Document ID: US9438235B2 - Status: Granted - Kind: B2 - Application number: 14/460,346 - Filed: 2014-08-14 - Published: 2015-07-16 - Granted: 2016-09-06 - Earliest claimed: 2014-01-16 - Assignees: Sitronix Technology Corp. - Applicants: Sitronix Technology Corp. - Inventors: Min-Nan Liao - Web page: https://patentgrep.com/patent/US9438235B2 ## CPC - H03K 19/00315: {in field-effect transistor circuits} - G09G 3/3677: {suitable for active matrices only} - H03K 17/687: the devices being field-effect transistors - H03K 19/018507: {Interface arrangements} - G09G 2310/0289: Details of voltage level shifters arranged for use in a driving circuit - G09G 2310/0291: Details of output amplifiers or buffers arranged for use in a driving circuit - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A circuit buffer for outputting a voltage signal having a magnitude greater than a withstand voltage of any circuit element in the circuit buffer includes a first transistor and a second transistor. The first transistor includes a first terminal and a second terminal electrically connected to an input terminal and an output terminal of the circuit buffer respectively, a third terminal electrically connected to a first power supply terminal, and a fourth terminal electrically connected to the third terminal of the first transistor. The second transistor includes a first terminal and a second terminal electrically connected to the input terminal and the output terminal of the circuit buffer respectively, a third terminal electrically connected to a second power supply terminal, and a fourth terminal electrically connected to the third terminal of the second transistor. Voltages of the first and second power supply terminal are switched between two different levels, respectively. ## Claims ### Claim 1 A gate driver, for outputting a voltage signal, the gate driver comprising: a plurality of circuit buffers, comprising: a first circuit buffer, comprising: a first power supply terminal, for receiving a first voltage; a second power supply terminal, for receiving a second voltage; an input terminal, for receiving a first input signal; and an output terminal, for outputting the voltage signal according to the first voltage, the second voltage and the first input signal; a second circuit buffer, comprising: a third power supply terminal, for receiving a third voltage; a fourth power supply terminal, electrically connected to the input terminal of the first circuit buffer, for receiving the first input signal; an input terminal, for receiving a second input signal; and an output terminal, electrically connected to the first power supply terminal, for outputting the first voltage to the first circuit buffer according to the third voltage, the first input signal and the second input signal; and a third circuit buffer, comprising: a fifth power supply terminal, electrically connected to the input terminal of the first circuit buffer, for receiving the first input signal; a sixth power supply terminal, for receiving a fourth voltage; an input terminal, for receiving a third input signal; and an output terminal, electrically connected to the second power supply terminal, for outputting the second voltage to the first circuit buffer according to the first input signal, the fourth voltage and the third input signal; wherein the first voltage, the second voltage, the third voltage and the fourth voltage are switched between two different voltage levels, and an amplitude of the voltage signal is greater than a withstand voltage of any circuit element in the gate driver. ### Claim 2 (depends on 1) The gate driver of claim 1, wherein the plurality of circuit buffers are divided into N stages, wherein N is greater than or equal to 2. ### Claim 3 (depends on 2) The gate driver of claim 2, further comprising: a level shifter module, electrically connected to each circuit buffer located in the first stage and the second stage among the plurality of circuit buffers, in order to provide two voltages and an input signal for each circuit buffer located in the first stage and provide an input signal for each circuit buffer located in the second stage. ### Claim 4 (depends on 1) The gate driver of claim 1, wherein the first voltage is switched between a first voltage level and a second voltage level, and the second voltage is switched between a third voltage level and a fourth voltage level, wherein the first voltage level is greater than the second voltage level and the third voltage level is greater than the fourth voltage level. ### Claim 5 (depends on 4) The gate driver of claim 4, wherein a voltage difference between the first voltage level and the second voltage level is greater than a withstand voltage between any two terminals of all transistors in the first circuit buffer. ### Claim 6 (depends on 4) The gate driver of claim 4, wherein a voltage difference between the third voltage level and the fourth voltage level is greater than a withstand voltage between any two terminals of all transistors in the first circuit buffer.