# US 9,438,215 B2 · Buffer circuit for buffering and settling input voltage to target voltage level and operation method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,438,215 B2 - Document ID: US9438215B2 - Status: Granted - Kind: B2 - Application number: 14/498,623 - Filed: 2014-09-26 - Published: 2015-09-17 - Granted: 2016-09-06 - Earliest claimed: 2014-03-11 - Assignees: SK hynix Inc. - Applicants: SK hynix Inc. - Inventors: Myung-Hwan Lee - Web page: https://patentgrep.com/patent/US9438215B2 ## CPC - H03K 5/02: by amplifying (H03K5/04 takes precedence) - H03K 5/2481: {with at least one differential stage} - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract A buffer circuit includes an amplifying unit suitable for comparing an input voltage of an input terminal with an output voltage of an output terminal, a current sinking unit suitable for controlling a sinking current of the amplifying unit when the input voltage is varied, and a current compensation unit suitable for uniformly maintaining a sinking current amount of the current sinking unit. ## Claims ### Claim 1 A buffer circuit, comprising: an amplifying unit suitable for comparing an input voltage of an input terminal with an output voltage of an output terminal; a current sinking unit suitable for controlling a sinking current of the amplifying unit when the input voltage is varied; a current compensation unit suitable for uniformly maintaining a sinking current amount of the current sinking unit; and a control signal generation unit suitable for receiving the input voltage to generate a control signal, which is activated when the input voltage is varied, wherein the current sinking unit is controlled by the control signal. ### Claim 2 (depends on 1) The buffer circuit of claim 1, wherein the current sinking unit comprises: a first current sinking unit suitable for controlling the sinking current of the input terminal of the amplifying unit; and a second current sinking unit coupled to the current compensation unit and suitable for controlling the sinking current of the output terminal of the amplifying unit. ### Claim 3 (depends on 1) The buffer circuit of claim 1, wherein the control signal generation unit includes a detection circuit suitable for detecting a state of the input voltage. ### Claim 4 (depends on 1) The buffer circuit of claim 1, wherein the amplifying unit comprises: a driving unit suitable for comparing the output voltage of the output terminal with the input voltage of the input terminal and outputting a voltage, which is amplified according to a compared value, as the output voltage; and an initial current sinking unit suitable for being driven based on a bias voltage applied from an external device. ### Claim 5 (depends on 4) The buffer circuit of claim 4, wherein the driving unit comprises: a comparison unit suitable for comparing the output voltage with the input voltage; an output unit suitable for outputting the output voltage, which is amplified based on an output signal outputted from the comparison unit; and a feedback unit suitable for providing a voltage level corresponding to the output voltage outputted from the output unit to the comparison unit. ### Claim 6 (depends on 5) The buffer circuit of claim 5, wherein the initial current sinking unit comprises: a first initial current sinking unit coupled to the comparison unit and suitable for controlling the sinking current of the comparison unit; and a second initial current sinking unit coupled to the output unit and suitable for controlling the sinking current of the output unit. ### Claim 7 (depends on 1) The buffer circuit of claim 1, wherein the current compensation unit includes a driving transistor, which is controlled by the output voltage of the output terminal. ### Claim 8 (depends on 7) The buffer circuit of claim 7, wherein the driving transistor has a same size as a transistor for receiving the input voltage. ### Claim 9 A buffer circuit, comprising: an amplifying unit suitable for comparing an input voltage of an input terminal with an output voltage of an output terminal; a current sinking unit coupled to the input terminal of the amplifying unit and suitable for controlling a sinking current of the amplifying unit when a power-up operation is performed; a current compensation unit coupled to the output terminal of the amplifying unit and suitable for uniformly maintaining a sinking current amount of the current sinking unit; and a control signal generation unit suitable for receiving the input voltage, the output voltage and a power-up signal, which is activated during the power-up operation, to generate a control signal activated during the power-up operation, wherein the current sinking unit is controlled by the control signal. ### Claim 10 (depends on 9) The buffer circuit of claim 9, wherein the current sinking unit comprises: a first current sinking unit suitable for controlling the sinking current of the input terminal of the amplifying unit; and a second current sinking unit coupled to the current compensation unit and suitable for controlling the sinking current of the output terminal of the amplifying unit. ### Claim 11 (depends on 9) The buffer circuit of claim 9, wherein the control signal generation unit includes a level comparison unit suitable for comparing the voltage level of the output voltage with a reference input voltage, which is generated by increasing the input voltage by a predetermined level, and generating the control signal based on the output signal outputted from the level comparison unit or the power-up signal. ### Claim 12 (depends on 9) The buffer circuit of claim 9, wherein the amplifying unit comprises: a driving unit suitable for comparing the output voltage of the output terminal with the input voltage of the input terminal to output the output voltage; and an initial current sinking unit suitable for being driven based on a bias voltage applied from an external device. ### Claim 13 (depends on 12) The buffer circuit of claim 12, wherein the driving unit comprises: a comparison unit suitable for comparing the output voltage with the input voltage; an output unit suitable for outputting the output voltage, which is amplified based on an output signal outputted from the comparison unit; and a feedback unit suitable for providing a voltage level corresponding to the output voltage outputted from the output unit to the comparison unit. ### Claim 14 (depends on 12) The buffer circuit of claim 12, wherein the initial current sinking unit comprises: a first initial current sinking unit coupled to the comparison unit and suitable for controlling the sinking current of the comparison unit; and a second initial current sinking unit coupled to the output unit and suitable for controlling the sinking current of the output unit. ### Claim 15 (depends on 9) The buffer circuit of claim 9, wherein the current compensation unit includes a driving transistor, which is controlled by the output voltage of the output terminal. ### Claim 16 (depends on 15) The buffer circuit of claim 15, wherein the driving transistor has the same size as a transistor for receiving the input voltage. ### Claim 17 (depends on 9) The buffer circuit of claim 9, wherein the input voltage is a fixed voltage.