# US 9,438,189 B2 · Low voltage multi-stage amplifier > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,438,189 B2 - Document ID: US9438189B2 - Status: Granted - Kind: B2 - Application number: 13/793,933 - Filed: 2013-03-11 - Published: 2014-01-30 - Granted: 2016-09-06 - Earliest claimed: 2012-07-26 - Assignees: QUALCOMM Incorporated - Applicants: QUALCOMM Incorporated - Inventors: Vijayakumar Dhanasekaran - Web page: https://patentgrep.com/patent/US9438189B2 ## CPC - H03F 3/45179: {using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence)} - H03F 1/0261: {with control of the polarisation voltage or current, e.g. gliding Class A} - H03F 3/211: {using a combination of several amplifiers (H03F3/60 takes precedence)} - H03F 3/3022: {CMOS common source output SEPP amplifiers (H03F3/3008 takes precedence)} - H03F 3/345: with field-effect devices (H03F3/347 takes precedence) - H03F 1/22: by use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively - H03F 1/223: {with MOSFET's} - H03F 2200/405: the output amplifying stage of an amplifier comprising more than three power stages - H03F 2200/408: the output amplifying stage of an amplifier comprising three power stages - H03F 2200/453: Controlling being realised by adding a replica circuit or by using one among multiple identical circuits as a replica circuit - H03F 2200/456: A scaled replica of a transistor being present in an amplifier - H03F 2200/61: the cascode amplifier has more than one common gate stage - H03F: AMPLIFIERS ## Abstract A low voltage multi-stage amplifier is described. The low voltage multi-stage amplifier includes one or more prior stages. The low voltage multi-stage amplifier also includes a supply stage. The low voltage multi-stage amplifier further includes an output stage that operates with a supply voltage as low as a sum of a threshold voltage of a first transistor in the output stage and a saturation voltage of a second transistor of the supply stage. The supply stage supplies the output stage. ## Claims ### Claim 1 A low voltage multi-stage amplifier, comprising: one or more prior stages; a supply stage; an output stage, wherein the supply stage supplies the output stage; and biasing circuitry that sets quiescent current for proper operation of the output stage via the supply stage, wherein the biasing circuitry comprises a replica current stage, a minimum selector and an error amplifier. ### Claim 2 (depends on 1) The low voltage multi-stage amplifier of claim 1, wherein the supply stage also operates as a damping stage. ### Claim 3 (depends on 1) The low voltage multi-stage amplifier of claim 1, wherein the replica current stage provides a first bias voltage and a second bias voltage to the minimum selector, wherein the minimum selector provides a determined voltage to the error amplifier, and wherein the error amplifier controls the supply stage that sets a quiescent current of the output stage. ### Claim 4 (depends on 3) The low voltage multi-stage amplifier of claim 3, wherein the determined voltage is an average of the first bias voltage and the second bias voltage if the first bias voltage and the second bias voltage are within a minimum selector transistor saturation voltage of each other, and wherein the determined voltage is the smaller of the first bias voltage and the second bias voltage if the first bias voltage and the second bias voltage are not within the minimum selector transistor saturation voltage of each other. ### Claim 5 (depends on 3) The low voltage multi-stage amplifier of claim 3, wherein the error amplifier outputs a first control voltage and a second control voltage to the supply stage. ### Claim 6 (depends on 1) The low voltage multi-stage amplifier of claim 1, wherein the one or more prior stages comprises a first stage and a second stage, wherein the first stage receives an input signal, wherein an output of the first stage is coupled to the second stage, wherein an output of the second stage is coupled to the output stage, and wherein the output stage outputs an output signal. ### Claim 7 (depends on 6) The low voltage multi-stage amplifier of claim 6, wherein additional bias current is not needed to support the supply stage since current in the second stage is recycled. ### Claim 8 (depends on 1) The low voltage multi-stage amplifier of claim 1, wherein the low voltage multi-stage amplifier is a class-G amplifier. ### Claim 9 (depends on 1) The low voltage multi-stage amplifier of claim 1, wherein the low voltage multi-stage amplifier is a class-H amplifier. ### Claim 10 (depends on 1) The low voltage multi-stage amplifier of claim 1, wherein the low voltage multi-stage amplifier is configured to match supply voltages of the output stage to an output signal of the output stage. ### Claim 11 (depends on 1) The low voltage multi-stage amplifier of claim 1, wherein the output stage operates with supply voltages of +/−0.45 volts. ### Claim 12 (depends on 1) The low voltage multi-stage amplifier of claim 1, wherein the output stage comprises an n-channel transistor and a p-channel transistor. ### Claim 13 (depends on 12) The low voltage multi-stage amplifier of claim 12, wherein the n-channel transistor is coupled to a first voltage and the p-channel transistor is coupled to a second voltage. ### Claim 14 (depends on 13) The low voltage multi-stage amplifier of claim 13, wherein first voltage and the second voltage are coupled to the biasing circuitry. ### Claim 15 (depends on 1) The low voltage multi-stage amplifier of claim 1, wherein the output stage comprises a first transistor and the supply stage comprises a second transistor. ### Claim 16 (depends on 15) The low voltage multi-stage amplifier of claim 15, wherein the output stage operates with a supply voltage as low as a sum of a threshold voltage of the first transistor in the output stage and a saturation voltage of the second transistor of the supply stage. ### Claim 17 (depends on 15) The low voltage multi-stage amplifier of claim 15, wherein the first transistor is a p-channel transistor and wherein the second transistor is an n-channel transistor. ### Claim 18 (depends on 17) The low voltage multi-stage amplifier of claim 17, wherein a source of the first transistor is coupled to a variable positive supply voltage, wherein a gate of the first transistor is coupled to a drain of the second transistor, and wherein a source of the second transistor is coupled to a variable negative supply voltage. ### Claim 19 A method for amplification, the method comprising: obtaining an input signal; and amplifying the input signal using a low voltage multi-stage amplifier that comprises: one or more prior stages; a supply stage; an output stage, wherein the supply stage supplies the output stage; and biasing circuitry that sets quiescent current for proper operation of the output stage via the supply stage, wherein the biasing circuitry comprises a replica current stage, a minimum selector and an error amplifier. ### Claim 20 (depends on 19) The method of claim 19, wherein the supply stage also operates as a damping stage. ### Claim 21 (depends on 19) The method of claim 19, wherein the replica current stage provides a first bias voltage and a second bias voltage to the minimum selector, wherein the minimum selector provides a determined voltage to the error amplifier, and wherein the error amplifier controls the supply stage that sets a quiescent current of the output stage. ### Claim 22 (depends on 21) The method of claim 21, wherein the determined voltage is an average of the first bias voltage and the second bias voltage if the first bias voltage and the second bias voltage are within a minimum selector transistor saturation voltage of each other, and wherein the determined voltage is the smaller of the first bias voltage and the second bias voltage if the first bias voltage and the second bias voltage are not within the minimum selector transistor saturation voltage of each other. ### Claim 23 (depends on 21) The method of claim 21, wherein the error amplifier outputs a first control voltage and a second control voltage to the supply stage. ### Claim 24 (depends on 19) The method of claim 19, wherein the output stage comprises a first transistor and the supply stage comprises a second transistor, and wherein the first transistor is a p-channel transistor and wherein the second transistor is an n-channel transistor. ### Claim 25 (depends on 24) The method of claim 24, wherein a source of the first transistor is coupled to a variable positive supply voltage, wherein a gate of the first transistor is coupled to a drain of the second transistor, and wherein a source of the second transistor is coupled to a variable negative supply voltage. ### Claim 26 (depends on 19) The method of claim 19, wherein the one or more prior stages comprises a first stage and a second stage, wherein the first stage receives an input signal, wherein an output of the first stage is coupled to the second stage, wherein an output of the second stage is coupled to the output stage, and wherein the output stage outputs an output signal. ### Claim 27 (depends on 26) The method of claim 26, wherein additional bias current is not needed to support the supply stage since current in the second stage is recycled. ### Claim 28 (depends on 19) The method of claim 19, wherein the low voltage multi-stage amplifier is a class-G amplifier. ### Claim 29 (depends on 19) The method of claim 19, wherein the low voltage multi-stage amplifier is a class-H amplifier. ### Claim 30 (depends on 19) The method of claim 19, wherein the low voltage multi-stage amplifier is configured to match supply voltages of the output stage to an output signal of the output stage. ### Claim 31 (depends on 19) The method of claim 19, wherein the output stage operates with supply voltages of +/−0.45 volts. ### Claim 32 (depends on 19) The method of claim 19, wherein the output stage comprises an n-channel transistor and a p-channel transistor. ### Claim 33 (depends on 32) The method of claim 32, further comprising providing a first voltage to the n-channel transistor and providing a second voltage to the p-channel transistor. ### Claim 34 An apparatus, comprising: means for obtaining an input signal; and means for amplifying the input signal, wherein the means for amplifying the input signal comprise: one or more prior stages; a supply stage; an output stage, wherein the supply stage supplies the output stage; and biasing circuitry that sets quiescent current for proper operation of the output stage via the supply stage, wherein the biasing circuitry comprises a replica current stage, a minimum selector and an error amplifier. ### Claim 35 (depends on 34) The apparatus of claim 34, wherein the apparatus is configured to match supply voltages of an output stage to an output signal of the output stage. ### Claim 36 (depends on 34) The apparatus of claim 34, wherein the output stage operates with supply voltages of +/−0.45 volts. ### Claim 37 (depends on 34) The apparatus of claim 34, wherein the output stage comprises an n-channel transistor and a p-channel transistor. ### Claim 38 A computer-program product configured for amplifying an input signal, the computer-program product comprising a non-transitory computer-readable medium having instructions thereon, the instructions comprising: code for causing a low voltage multi-stage amplifier to obtain an input signal; and code for causing the low voltage multi-stage amplifier to amplify the input signal, wherein the low voltage multi-stage amplifier comprises: one or more prior stages; a supply stage; an output stage, wherein the supply stage supplies the output stage; and biasing circuitry that sets quiescent current for proper operation of the output stage via the supply stage, wherein the biasing circuitry comprises a replica current stage, a minimum selector and an error amplifier. ### Claim 39 (depends on 38) The computer-program product of claim 38, wherein the low voltage multi-stage amplifier is configured to match supply voltages of the output stage to an output signal of the output stage. ### Claim 40 (depends on 38) The computer-program product of claim 38, wherein the output stage operates with supply voltages of +/−0.45 volts.