# US 9,438,188 B2 · Common-gate amplifier for high-speed DC-coupling communications > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,438,188 B2 - Document ID: US9438188B2 - Status: Granted - Kind: B2 - Application number: 14/486,885 - Filed: 2014-09-15 - Published: 2016-03-17 - Granted: 2016-09-06 - Earliest claimed: 2014-09-15 - Assignees: QUALCOMM Incorporated - Applicants: QUALCOMM Incorporated - Inventors: Miao Li; Li Sun; Zhi Zhu - Web page: https://patentgrep.com/patent/US9438188B2 ## CPC - H03F 3/45071: {with semiconductor devices only} - H03F 3/183: with semiconductor devices only - H03F 3/45179: {using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence)} - H03F 3/45677: {Controlling the active amplifying circuit of the differential amplifier} - H03F 3/45713: {Controlling the active amplifying circuit of the differential amplifier} - H04B 1/16: Circuits - H04L 25/0272: {Arrangements for coupling to multiple lines, e.g. for differential transmission} - H03F 2200/129: there being a feedback over the complete amplifier - H03F 2200/255: Amplifier input adaptation especially for transmission line coupling purposes, e.g. impedance adaptation - H03F 2200/36: the amplifier comprising means for increasing the bandwidth - H03F 2200/453: Controlling being realised by adding a replica circuit or by using one among multiple identical circuits as a replica circuit - H03F 2203/45008: the addition of two signals being made by a resistor addition circuit for producing the common mode signal - H03F 2203/45078: the common mode signal being taken or deducted from the one or more inputs of the differential amplifier - H03F 2203/45112: the biasing of the differential amplifier being controlled from the input or the output signal - H03F 2203/45302: the common gate stage of a cascode dif amp being controlled - H03F 2203/45306: the common gate stage implemented as dif amp eventually for cascode dif amp - H03F 2203/45418: the CMCL comprising a resistor addition circuit - H03F 2203/45422: the CMCL comprising one or more capacitors not as integrating capacitor, e.g. for stability purposes - H03F 2203/45424: the CMCL comprising a comparator circuit - H03F: AMPLIFIERS - H04B: TRANSMISSION - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract In one embodiment, a receiver comprises a differential common-gate amplifier having a differential input and a differential output, wherein the differential input comprises a first input and a second input, and the differential common-gate amplifier is configured to amplify an input differential signal at the differential input into an amplified differential signal at the differential output. The receiver also comprises a common-mode voltage sensor configured to sense a common-mode voltage of the input differential signal, a replica circuit configured to generate a replica voltage that tracks a direct current (DC) voltage at at least one of the first and second inputs, and a comparator configured to compare the sensed common-mode voltage with the replica voltage, and to adjust a first bias voltage input to the differential common-gate amplifier based on the comparison, wherein the DC voltage depends on the first bias voltage. ## Claims ### Claim 1 A receiver, comprising: a differential common-gate amplifier having a differential input and a differential output, wherein the differential input comprises a first input and a second input, and the differential common-gate amplifier is configured to amplify an input differential signal at the differential input into an amplified differential signal at the differential output; a common-mode voltage sensor configured to sense a common-mode voltage of the input differential signal; a replica circuit configured to generate a replica voltage that tracks a direct current (DC) voltage at at least one of the first and second inputs; and a comparator comprising an amplifier having a first input coupled to the sensed common-mode voltage, a second input coupled to the replica voltage, and an output configured to output a first bias voltage to the differential common-gate amplifier, wherein the DC voltage depends on the first bias voltage, and the amplifier is configured to compare the sensed common-mode voltage with the replica voltage, and to adjust the first bias voltage in a direction that reduces a difference between the replica voltage and the sensed common-mode voltage. ### Claim 2 (depends on 1) The receiver of claim 1, wherein the differential output comprises a first output and a second output, and the differential common-gate amplifier comprises: a first transistor having a drain coupled to the first output, a source coupled to the first input, and a gate biased by the first bias voltage; and a second transistor having a drain coupled to the second output, a source coupled to the second input, and a gate biased by the first bias voltage. ### Claim 3 (depends on 2) The receiver of claim 2, wherein the differential common-gate amplifier further comprises: a first resistor coupled between the source of the first transistor and the first input; and a second resistor coupled between the source of the second transistor and the second input. ### Claim 4 (depends on 2) The receiver of claim 2, wherein the differential common-gate amplifier further comprises: a first load resistor coupled between a supply voltage and the drain of the first transistor; and a second load resistor coupled between the supply voltage and the drain of the second transistor. ### Claim 5 (depends on 4) The receiver of claim 4, wherein the first load resistor comprises two resistors coupled in series between the supply voltage and the drain of the first transistor, and the receiver further comprises a shunt capacitor having one terminal coupled to the first input and a second terminal coupled to a node between the two resistors. ### Claim 6 (depends on 2) The receiver of claim 2, wherein the receiver further comprises a current source coupled to the replica circuit, the replica circuit is configured to generate a second bias voltage based on a current of the current source, and the differential common-gate amplifier further comprises: a third transistor having a drain coupled to the first input, a source coupled to a ground, and a gate biased by the second bias voltage; and a fourth transistor having a drain coupled to the second input, a source coupled to the ground, and a gate biased by the second bias voltage. ### Claim 7 (depends on 6) The receiver of claim 6, wherein the replica circuit comprises: a fifth transistor having a drain coupled to the current source, a source, and a gate biased by the first bias voltage; and a sixth transistor having a drain coupled to the source of the fifth transistor, a source coupled to the ground, and a gate coupled to the gates of the third transistor and the fourth transistor, wherein a gate voltage of the sixth transistor corresponds to the second bias voltage, and the replica voltage is provided at a node between the source of the fifth transistor and the drain of the sixth transistor. ### Claim 8 (depends on 1) The receiver of claim 1, wherein the common-mode voltage sensor comprises two resistors coupled in series between the first input and the second input, wherein the sensed common-mode voltage is provided at a node between the two resistors. ### Claim 9 (depends on 1) The receiver of claim 1, wherein the differential output comprises a first output and a second output, and the differential common-gate amplifier comprises: a first shunt capacitor coupled between the first input and the first output; and a second shunt capacitor coupled between the second input and the second output. ### Claim 10 (depends on 1) The receiver of claim 1, wherein the replica voltage is approximately equal to the DC voltage. ### Claim 11 A method for operating a differential common-gate amplifier having a differential input and a differential output, wherein the differential input comprises a first input and a second input, the method comprising: sensing a common-mode voltage of a differential signal input to the differential input of the differential common-gate amplifier; generating a replica voltage that tracks a direct current (DC) voltage at at least one of the first and second inputs; comparing the sensed common-mode voltage with the replica voltage; and adjusting a first bias voltage input to the differential common-gate amplifier based on the comparison in a direction that reduces a difference between the replica voltage and the sensed common-mode voltage, wherein the DC voltage depends on the first bias voltage; wherein the comparing and adjusting are performed using an amplifier having a first input coupled to the sensed common-mode voltage, a second input coupled to the replica voltage, and an output configured to output the first bias voltage. ### Claim 12 (depends on 11) The method of claim 11, further comprising generating a second bias voltage input to the differential common-gate amplifier based on a current from a current source, wherein the second bias voltage controls a bias current of the differential common-gate amplifier. ### Claim 13 (depends on 11) The method of claim 11, further comprising providing an alternating current (AC) shunt path between the differential input and the differential output to extend a bandwidth of the differential common-gate amplifier. ### Claim 14 (depends on 11) The method of claim 11, wherein the replica voltage is approximately equal to the DC voltage. ### Claim 15 An apparatus for operating a differential common-gate amplifier having a differential input and a differential output, wherein the differential input comprises a first input and a second input, the apparatus comprising: means for sensing a common-mode voltage of a differential signal input to the differential input of the differential common-gate amplifier; means for generating a replica voltage that tracks a direct current (DC) voltage at at least one of the first and second inputs; means for comparing the sensed common-mode voltage with the replica voltage; and means for adjusting a first bias voltage input to the differential common-gate amplifier based on the comparison in a direction that reduces a difference between the replica voltage and the sensed common-mode voltage, wherein the DC voltage depends on the first bias voltage, wherein the comparing and adjusting are performed using an amplifier having a first input coupled to the sensed common-mode voltage, a second input coupled to the replica voltage, and an output configured to output the first bias voltage. ### Claim 16 (depends on 15) The apparatus of claim 15, further comprising means for generating a second bias voltage input to the differential common-gate amplifier based on a current from a current source, wherein the second bias voltage controls a bias current of the differential common-gate amplifier. ### Claim 17 (depends on 15) The apparatus of claim 15, further comprising means for providing an alternating current (AC) shunt path between the differential input and the differential output. ### Claim 18 (depends on 15) The apparatus of claim 15, wherein the replica voltage is approximately equal to the DC voltage.