# US 9,437,842 B2 · Light-emitting transistors with improved performance

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- Number: US 9,437,842 B2
- Document ID: US9437842B2
- Status: Granted
- Kind: B2
- Application number: 14/817,203
- Filed: 2015-08-03
- Published: 2016-02-04
- Granted: 2016-09-06
- Earliest claimed: 2012-08-25
- Assignees: Polyera Corporation
- Applicants: Polyera Corporation
- Inventors: Antonio Facchetti
- Web page: https://patentgrep.com/patent/US9437842B2

## CPC

- H10K 50/30: Organic light-emitting transistors
- H10H 20/062: {Light-emitting semiconductor devices having field effect type light-emitting regions, e.g. light-emitting High-Electron Mobility Transistors}
- H10K 50/10: OLEDs or polymer light-emitting diodes [PLED]
- H10K 50/11: characterised by the electroluminescent [EL] layers
- H10K 50/15: Hole transporting layers
- H10K 50/16: Electron transporting layers
- H10K 50/805: Electrodes
- H10K 85/636: {comprising heteroaromatic hydrocarbons as substituents on the nitrogen atom}
- H10K 2102/3035: {Edge emission}
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS

## Abstract

Disclosed are light-emitting transistors having novel structures that can lead to enhanced device brightness, specifically, via incorporation of additional electrically insulating components that can favor charge localization and in turn, carrier recombination and exciton formation.

## Claims

### Claim 1

A light-emitting transistor device comprising:
a substrate;
a gate electrode;
a channel layer comprising one or more organic sublayers, the one or more organic sublayers comprising:
a first sublayer comprising an electron-transporting semiconductor material,
a second sublayer comprising a hole-transporting semiconductor material, and
a third sublayer comprising an electroluminescent semiconductor material and positioned between the first sublayer and the second sublayer;
a gate insulating layer positioned between the gate electrode and the channel layer; and
a hole electrode and an electron electrode being spaced apart from each other at a planar distance defining the length (L) of a channel region therebetween, the hole electrode being in contact with the second sublayer of the channel layer and the electron electrode being in contact with the first sublayer of the channel layer;
wherein the channel layer further comprises a first electrically insulating element positioned between the hole electrode and the first sublayer of the channel layer, and a second electrically insulating element between the electron electrode and the second sublayer of the channel layer, wherein the first electrically insulating element and the second electrically insulating element are spaced apart from each other at a planar distance that is less than L; and
wherein the first electrically insulating element overlaps vertically with the hole electrode but not the electron electrode and the second electrically insulating element overlaps vertically with the electron electrode but not the hole electrode.

### Claim 2 (depends on 1)

The device of claim 1, wherein the first electrically insulating element and the second electrically insulating element are in contact with the third sublayer.

### Claim 3 (depends on 1)

The device of claim 1, wherein the first electrically insulating element, the second electrically insulating element and the electroluminescent semiconductor material together comprise the third sublayer.

### Claim 4 (depends on 1)

The device of claim 1, further comprising an electron-injection layer deposited between the electron-transporting semiconductor material and the electron electrode.

### Claim 5 (depends on 1)

The device of claim 1, further comprising a hole-injection layer deposited between the hole-transporting semiconductor material and the hole electrode.

### Claim 6 (depends on 1)

The device of claim 1, further comprising a passivation layer covering a top surface of the channel layer.

### Claim 7 (depends on 1)

The device of claim 1, wherein the substrate comprises a surface-modifying material deposited on a surface of the substrate.

### Claim 8 (depends on 1)

The device of claim 1, wherein the gate electrode comprises a length (LG) that is identical to L, and wherein the edges of the gate electrode are aligned with an edge of the hole electrode and an edge of the electron electrode.

### Claim 9 (depends on 1)

The device of claim 1, wherein the gate electrode comprises a length (LG) that is greater than L, and wherein at least one edge of the gate electrode overlaps with one of the hole electrode and the electron electrode.

### Claim 10 (depends on 1)

An optoelectronic device for producing an image, wherein the optoelectronic device comprises a plurality of identical or different light-emitting transistor devices according to claim 1 interconnected to each other and deposited on a substrate.