# US 9,437,750 B1 · Thin film transistor and method of making same

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- Number: US 9,437,750 B1
- Document ID: US9437750B1
- Status: Granted
- Kind: B1
- Application number: 14/726,160
- Filed: 2015-05-29
- Granted: 2016-09-06
- Earliest claimed: 2015-04-14
- Assignees: Hon Hai Precision Industry Co., Ltd.
- Applicants: Hon Hai Precision Industry Co., Ltd.
- Inventors: Kuo-Lung Fang; Yi-Chun Kao; Hsin-Hua Lin; Chih-Lung Lee; Po-Li Shih
- Web page: https://patentgrep.com/patent/US9437750B1

## CPC

- H10D 86/0231: {using masks, e.g. half-tone masks}
- H10D 30/031: {of thin-film transistors [TFT]}
- H10D 30/0316: {of lateral bottom-gate TFTs comprising only a single gate}
- H10D 30/6713: {characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes}
- H10D 30/6729: {characterised by the electrodes}
- H10D 30/673: {characterised by the shapes, relative sizes or dispositions of the gate electrodes}
- H10D 30/6732: {Bottom-gate only TFTs}
- H10D 30/6745: {Polycrystalline or microcrystalline silicon}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/60: wherein the TFTs are in active matrices
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10D 30/0321: {comprising silicon, e.g. amorphous silicon or polysilicon}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A method for forming a TFT includes providing a substrate, and forming a gate electrode, an electrically insulating layer, a semiconductor layer, an etch stop layer and a photoresist layer successively on the substrate. A photolithographic process is performed to the photoresist layer by using a half-tone mask to thereby configure the photoresist layer to have two recesses in a top thereof. Two lateral ends of the etch stop layer are etched away to form an etch stop pattern. The photoresist layer is heated to flow downwardly. Two lateral ends of the semiconductor channel are etched away to become a channel layer. An ashing is performed to the photoresist layer to have the recesses thereof communicate atmosphere with the etch stop pattern. The etch stop pattern is etched to define first and second through holes. Source and drain electrodes are formed to electrically connect with the channel layer.

## Claims

### Claim 1

A method for forming a thin film transistor comprising:
providing a substrate;
forming a gate electrode on the substrate;
forming an electrically insulating layer on the substrate to cover the gate electrode therein;
forming a semiconductor layer on the electrically insulating layer;
forming an etch stop layer on the semiconductor layer;
forming a photoresist layer on the etch stop layer;
processing the photoresist layer by photolithography using a mask to have the photoresist layer become a first photoresist pattern which has a configuration in cross section of a trapezoid defining at least two recesses in a top thereof;
etching two lateral end portions of the etch stop layer which are not covered by the first photoresist pattern, whereby the etch stop layer becomes an etch stop pattern;
deforming the first photoresist pattern to cause the first photoresist pattern to move downwardly to reach the semiconductor layer, whereby the first photoresist pattern becomes a second photoresist pattern;
etching two lateral end portions of the semiconductor layer which are not covered by the second photoresist pattern, whereby the semiconductor layer becomes a channel layer for the thin film transistor;
ashing the second photoresist pattern to cause the second photoresist pattern to become a third photoresist pattern having the at least two recesses, the etch stop pattern being exposed to atmosphere via the at least two recesses in the third photoresist pattern;
etching the etch stop pattern via the at least two recesses in the third photoresist pattern to cause the etch stop pattern to define at least a first through hole and at least a second through hole therein;
removing the third photoresist pattern; and
forming a source electrode electrically coupling with a lateral end of the channel layer and a drain electrode electrically coupling with an opposite lateral end of the channel layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein the mask is a half-tone mask.

### Claim 3 (depends on 2)

The method of claim 2, wherein the half-tone mask has two full-transmission regions located at two lateral ends thereof, three non-transmission regions located between the two full-transmission regions and two half-transmission regions alternated with the non-transmission regions, the at least two recesses being two recesses, the two half-transmission regions being for forming the two recesses, the recesses each having a depth which is substantially equal to a half of a height of the first photoresist pattern.

### Claim 4 (depends on 2)

The method of claim 2, wherein the deformation of the first photoresist pattern is achieved by heating the first photoresist pattern.

### Claim 5 (depends on 4)

The method of claim 4, wherein the heating of the first photoresist pattern is achieved by reflow at a temperature of 80-175 degree Celsius.

### Claim 6 (depends on 4)

The method of claim 4, wherein the ashing of the second photoresist pattern is achieved by injecting one of oxygen and ozone to the second photoresist pattern.

### Claim 7 (depends on 4)

The method of claim 4, wherein the second photoresist pattern has a length and a height which are less than a length and a height of the first photoresist pattern.

### Claim 8 (depends on 4)

The method of claim 4, wherein a bottom of the trapezoid of the cross section of the first photoresist pattern is longer than a top thereof, and wherein the at least two recesses each have a cross section of a trapezoid with a top thereof being larger than a bottom thereof.

### Claim 9 (depends on 4)

The method of claim 4, wherein the source electrode extends downwardly into the at least a first through hole to electrically connect with the channel layer, the drain electrode extending downwardly into the at least a second through hole to electrically connect with the channel layer.

### Claim 10 (depends on 9)

The method of claim 9, wherein the channel layer is symmetrical to a center of the substrate.

### Claim 11 (depends on 9)

The method of claim 9, wherein a length of a lateral end portion of the channel layer extending laterally beyond a lateral side of the etch stop pattern is equal to a length of an opposite lateral end portion of the channel layer extending laterally beyond an opposite lateral side of the etch stop pattern.

### Claim 12 (depends on 11)

The method of claim 11, wherein the length is in a range between 0.3 micrometer and 0.5 micrometer.