# US 9,437,743 B2 · Thin film element, semiconductor device, and method for manufacturing the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,437,743 B2 - Document ID: US9437743B2 - Status: Granted - Kind: B2 - Application number: 13/237,191 - Filed: 2011-09-20 - Published: 2012-04-12 - Granted: 2016-09-06 - Earliest claimed: 2010-10-07 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Takafumi Mizoguchi; Kojiro Shiraishi; Masashi Tsubuku - Inventors: Takafumi Mizoguchi; Kojiro Shiraishi; Masashi Tsubuku - Web page: https://patentgrep.com/patent/US9437743B2 ## CPC - H10D 30/6704: {having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device} - H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate} - H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)} - H10D 62/80: characterised by the materials - H10D 86/0231: {using masks, e.g. half-tone masks} - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10D 86/60: wherein the TFTs are in active matrices - H10D 62/875: {being semiconductor metal oxide, e.g. InGaZnO (Group II-VI materials H10D62/86; Group I-VI materials H10D62/871; Pb compounds or alloys H10D62/874)} - H10W 10/021: {of air gaps} - H10W 10/20: Air gaps - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract An object is to provide a method for manufacturing a semiconductor device without exposing a specific layer to moisture or the like at all. A thin film element is manufactured in such a manner that a first film, a second film, and a third film are stacked in this order; a resist mask is formed over the third film; a mask layer is formed by etching the third film with the use of the resist mask; the resist mask is removed; a second layer and a first layer are formed by performing dry etching on the second film and the first film with the use of the mask layer; a fourth film is formed to cover at least the second layer and the first layer; and sidewall layers are formed to cover at least the entire side surfaces of the first layer by performing etch back on the fourth film. ## Claims ### Claim 1 A method for manufacturing a semiconductor device, the method comprising the steps of: forming a semiconductor film over a substrate; forming a conductive film over the semiconductor film; etching the semiconductor film and the conductive film consecutively by dry etching after forming the conductive film; forming an insulating film over the etched conductive film after etching the semiconductor film and the conductive film consecutively; etching the insulating film by anisotropic etching to form a sidewall which covers a side surface of the semiconductor film and to expose the conductive film after forming the insulating film; after the anisotropic etching forming a source electrode layer and a drain electrode layer by etching the conductive film whose side surface is covered by the sidewall; and forming a pixel electrode layer electrically connected to one of the source electrode layer and the drain electrode layer. ### Claim 2 (depends on 1) The method according to claim 1, wherein the semiconductor film comprises an oxide of a metal selected from In, Ga, and Zn. ### Claim 3 (depends on 1) The method according to claim 1, wherein the anisotropic etching is dry etching. ### Claim 4 (depends on 1) The method according to claim 1, wherein the etching of the insulating film is performed so that the sidewall entirely covers the side surface of the semiconductor film. ### Claim 5 (depends on 1) The method according to claim 1, further comprising the step of: forming a second sidewall so as to cover the sidewall. ### Claim 6 (depends on 1) The method according to claim 1, wherein the etching of the insulating film is performed so that a top surface of the conductive film is exposed. ### Claim 7 (depends on 1) The method according to claim 1, further comprising the step of: forming a second conductive film and a second insulating film before forming the semiconductor film, wherein the second insulating film is formed over the second conductive film, wherein the etching of the insulating film is performed so that the insulating film covers a side surface of a step of the second insulating film, and wherein the step of the second insulating film originates from a thickness of the second conductive film. ### Claim 8 (depends on 1) The method according to claim 1, wherein the formation of the source electrode and drain electrode layers is performed by dry etching. ### Claim 9 (depends on 8) The method according to claim 8, wherein the formation of the source electrode and drain electrode layers is performed so that the source electrode and drain electrode layers are spaced from the sidewall. ### Claim 10 A method for manufacturing a semiconductor device, the method comprising the steps of: forming a semiconductor film over a substrate; forming a conductive film over the semiconductor film; forming a mask layer over the conductive film; etching the semiconductor film and the conductive film consecutively by dry etching using the mask layer as a mask after forming the mask layer; forming an insulating film over the mask layer after etching the semiconductor film and the conductive film consecutively; etching the insulating film by anisotropic etching to form a sidewall which covers a side surface of the semiconductor film and to expose the mask layer after forming the insulating film; after the anisotropic etching forming a source electrode layer and a drain electrode layer by etching the conductive film whose side surface is covered by the sidewall; and forming a pixel electrode layer electrically connected to one of the source electrode layer and the drain electrode layer. ### Claim 11 (depends on 10) The method according to claim 10, wherein the semiconductor film comprises an oxide of a metal selected from In, Ga, and Zn. ### Claim 12 (depends on 10) The method according to claim 10, wherein the anisotropic etching is dry etching. ### Claim 13 (depends on 10) The method according to claim 10, wherein the etching of the insulating film is performed so that the sidewall entirely covers the side surface of the semiconductor film. ### Claim 14 (depends on 10) The method according to claim 10, further comprising the step of: forming a second sidewall so as to cover the sidewall. ### Claim 15 (depends on 10) The method according to claim 10, wherein the etching of the insulating film is performed so that a top surface of the mask layer is exposed. ### Claim 16 (depends on 10) The method according to claim 10, further comprising the step of: forming a second conductive film and a second insulating film before forming the semiconductor film, wherein the second insulating film is formed over the second conductive film, wherein the etching of the insulating film is performed so that the insulating film covers a side surface of a step of the second insulating film, and wherein the step of the second insulating film originates from a thickness of the second conductive film. ### Claim 17 (depends on 10) The method according to claim 10, wherein the formation of the source electrode and drain electrode layers is performed by dry etching. ### Claim 18 (depends on 17) The method according to claim 17, wherein the formation of the source electrode and drain electrode layers is performed so that the source electrode and drain electrode layers are spaced from the sidewall. ### Claim 19 (depends on 1) The method according to claim 1, wherein the insulating film is formed by a CVD method or a sputtering method. ### Claim 20 (depends on 10) The method according to claim 10, wherein the insulating film is formed by a CVD method or a sputtering method.