# US 9,437,709 B2 · Semiconductor device and fabrication method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,437,709 B2 - Document ID: US9437709B2 - Status: Granted - Kind: B2 - Application number: 15/012,297 - Filed: 2016-02-01 - Published: 2016-05-26 - Granted: 2016-09-06 - Earliest claimed: 2013-07-13 - Assignees: Semiconductor Manufacturing International (Shanghai) Corporation - Applicants: Semiconductor Manufacturing International (Shanghai) Corporation - Inventors: De Yuan Xiao - Web page: https://patentgrep.com/patent/US9437709B2 ## CPC - H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT} - H10D 30/4732: {using Group III-V semiconductor material} - H10D 30/478: {the 2D charge carrier gas being at least partially not parallel to a main surface of the semiconductor body} - H10D 30/60: Insulated-gate field-effect transistors [IGFET] (H10D30/40 takes precedence) - H10D 62/292: {Non-planar channels of IGFETs (resulting from the gate electrode dispositions, e.g. within trenches H10D64/512)} - H10D 62/812: {Single quantum well structures} - H10D 62/8161: {potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices (lateral superlattices, lateral surface superlattices H10D62/8181)} - H10D 99/00: Subject matter not provided for in other groups of this subclass - H10D 62/117: {Shapes of semiconductor bodies} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A semiconductor device and a method for fabricating the same are disclosed. In the method, a substrate structure is provided, including a substrate and a fin-shaped buffer layer formed on the surface of the substrate. A QW material layer is formed on the surface of the fin-shaped buffer layer. A barrier material layer is formed on the QW material layer. The QW material layer is suitable for forming an electron gas therein. Thereby the short-channel effect is improved, while high mobility of the semiconductor device is guaranteed. In addition, according to the present disclosure, thermal dissipation of the semiconductor device may be improved, and thus performance and stability of the device may be improved. ## Claims ### Claim 1 A method of fabricating a semiconductor device, comprising: providing a substrate structure including a substrate and a fin-shaped buffer layer formed over a surface of the substrate; forming a Quantum Well (QW) material layer on a surface of the fin-shaped buffer layer, the QW material layer being suitable for forming an electron gas therein; and forming a barrier material layer on the QW material layer, wherein the substrate further includes an insulating portion adjacent to the fin-shaped buffer laver, the insulating portion being formed along both sides of the buffer layer on the surface of the substrate which is not covered by the buffer layer, and wherein the forming a QW material layer on the surface of the fin-shaped buffer layer comprises: forming a QW material layer on the surface of the fin-shaped buffer layer that is not covered by the insulating portion. ### Claim 2 (depends on 1) The method according to claim 1, further comprising: forming a cap layer on the barrier material layer; and forming a gate structure including a gate insulating layer on a portion of the cap layer and a portion of the insulating portion, a gate on the gate insulating layer, and a spacer for the gate. ### Claim 3 (depends on 2) The method according to claim 2, further comprising: conducting an etching with the gate structure as a mask, until a portion of the fin-shaped buffer layer is removed by the etching; and growing a semiconductor material on the etched portion of the fin-shaped buffer layer to form a source region and a drain region. ### Claim 4 A method of fabricating a semiconductor device, comprising: providing a substrate structure including a substrate and a fin-shaped buffer layer formed over a surface of the substrate; forming a Quantum Well (QW) material layer on a surface of the fin-shaped buffer layer, the QW material layer being suitable for forming an electron gas therein; forming a barrier material layer on the QW material laver; forming a cap layer on the barrier material layer; and forming a gate structure including a gate insulating layer on at least a portion of the cap layer, a gate on the gate insulating layer, and a spacer for the gate. ### Claim 5 (depends on 4) The method according to claim 4, further comprising: conducting an etching with the gate structure as a mask, until a portion of the fin-shaped buffer layer is removed by the etching; and growing a semiconductor material on the etched portion of the fin-shaped buffer layer to form a source region and a drain region. ### Claim 6 (depends on 4) The method according to claim 4, wherein the step of providing a substrate structure comprises: forming a buffer layer over the substrate; patterning the buffer layer to form the fin-shaped buffer layer. ### Claim 7 (depends on 4) The method according to claim 4, wherein: the fin-shaped buffer layer has a thickness in range of about 1-2 μm; the QW material layer has a thickness in range of about 10-50 nm; and/or the barrier material layer has a thickness in range of about 1-5 nm. ### Claim 8 (depends on 4) The method according to claim 4, wherein the forming of the QW material layer and/or the forming of the barrier material layer comprise(s) selective epitaxy growth. ### Claim 9 A method of fabricating a semiconductor device, comprising: providing a substrate structure including a substrate and a fin-shaped buffer layer formed over a surface of the substrate; forming a Quantum Well (QW) material layer on a surface of the fin-shaped buffer layer, the QW material layer being suitable for forming an electron gas therein; forming a barrier material layer on the QW material layer, wherein: the material of the fin-shaped buffer layer is AlN; the material of the QW material layer is GaN; and the material of the barrier material layer is AlN. ### Claim 10 (depends on 9) The method according to claim 9, wherein: the substrate is a Silicon substrate. ### Claim 11 (depends on 9) The method according to claim 9, wherein: the QW material is one of the following materials: InGaN, AlGaN, Ge, Group III-Group V semiconductor materials, or Group II-Group VI semiconductor materials.