# US 9,437,685 B2 · Group III-V device with a selectively reduced impurity concentration

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- Number: US 9,437,685 B2
- Document ID: US9437685B2
- Status: Granted
- Kind: B2
- Application number: 14/449,491
- Filed: 2014-08-01
- Published: 2014-11-20
- Granted: 2016-09-06
- Earliest claimed: 2011-09-21
- Assignees: Infineon Technologies Americas Corp.
- Applicants: Infineon Tehnologies Americas Corp.
- Inventors: Michael A. Briere
- Web page: https://patentgrep.com/patent/US9437685B2

## CPC

- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT}
- H10D 30/47: having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D 30/4755: {having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs}
- H10D 30/60: Insulated-gate field-effect transistors [IGFET] (H10D30/40 takes precedence)
- H10D 62/393: {Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127)}
- H10D 62/60: Impurity distributions or concentrations
- H10D 62/8171: {Doping structures, e.g. doping superlattices or nipi superlattices}
- H10D 62/824: comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions
- H10D 62/854: further characterised by the dopants
- H10P 14/20: of semiconductor materials
- H10P 14/24: using chemical vapour deposition [CVD]
- H10P 14/2901: {Materials}
- H10P 14/2908: {Nitrides}
- H10P 14/3214: {being Group IIIA-VA semiconductors}
- H10P 14/3216: {Nitrides}
- H10P 14/3251: {consisting of three or more layers}
- H10P 14/3254: {Graded layers}
- H10P 14/3416: {Nitrides}
- H10P 14/3448: {Delta-doping}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

There are disclosed herein various implementations of a semiconductor structure and method. The semiconductor structure comprises a substrate, a transition body over the substrate, and a group III-V intermediate body having a bottom surface over the transition body. The semiconductor structure also includes a group III-V device layer over a top surface of the group III-V intermediate body. The group III-V intermediate body has a continuously reduced impurity concentration wherein a higher impurity concentration at the bottom surface is continuously reduced to a lower impurity concentration at the top surface.

## Claims

### Claim 1

A semiconductor structure comprising:
a transition body having an impurity concentration that varies between a bottom surface and a top surface of said transition body such that a top surface impurity concentration of said transition body is less than or substantially equal to a bottom surface impurity concentration of said transition body;
a group III-V intermediate body having a bottom surface over said transition body;
a group III-V device layer over a top surface of said group III-V intermediate body;
said group III-V intermediate body having a continuously reduced impurity concentration wherein a higher impurity concentration at said bottom surface is continuously reduced to a lower impurity concentration at said top surface;
said lower impurity concentration occurring at a depth below said top surface and remaining substantially constant from said depth to said top surface.

### Claim 2 (depends on 1)

The semiconductor structure of claim 1, wherein an impurity producing said higher and lower impurity concentrations is a P type impurity.

### Claim 3 (depends on 1)

The semiconductor structure of claim 1, wherein said continuously reduced impurity concentration comprises a continuously reduced carbon concentration.

### Claim 4 (depends on 1)

The semiconductor structure of claim 1, wherein said continuously reduced impurity concentration includes a plurality of impurity species.

### Claim 5 (depends on 1)

The semiconductor structure of claim 1, wherein said group III-V intermediate body comprises a compositionally graded III-Nitride body having a first III-Nitride composition at said bottom surface and a second III-Nitride composition above said bottom surface.

### Claim 6 (depends on 1)

The semiconductor structure of claim 1, wherein said group III-V device layer includes at least one of a III-Nitride field-effect transistor (FET) and a III-Nitride high electron mobility transistor (HEMT).

### Claim 7 (depends on 1)

The semiconductor structure of claim 1, wherein said transition body includes a group III-V transition structure.

### Claim 8 (depends on 7)

The semiconductor structure of claim 7, wherein said impurity concentration of said transition body varies in a step-wise fashion from said bottom surface impurity concentration to said top surface impurity concentration.

### Claim 9

A semiconductor structure comprising:
a transition body having an impurity concentration that varies between a bottom surface and a top surface of said transition body such that a top surface impurity concentration of said transition body is less than or substantially equal to a bottom surface impurity concentration of said transition body, and wherein said impurity concentration at least at one depth position between said top surface and said bottom surface is greater than said bottom surface impurity concentration;
a group III-V intermediate body having a bottom surface over said transition body;
a group III-V device layer over a top surface of said group III-V intermediate body;
said group III-V intermediate body having a continuously reduced impurity concentration wherein a higher impurity concentration at said bottom surface is continuously reduced to a lower impurity concentration at said top surface;
wherein said group III-V intermediate body comprises a compositionally graded III-Nitride body having a first III-Nitride composition at said bottom surface and a second III-Nitride composition above said bottom surface.

### Claim 10 (depends on 9)

The semiconductor structure of claim 9, wherein an impurity producing said higher and lower impurity concentrations is a P type impurity.

### Claim 11 (depends on 9)

The semiconductor structure of claim 9, wherein said continuously reduced impurity concentration comprises a continuously reduced carbon concentration.

### Claim 12 (depends on 9)

The semiconductor structure of claim 9, wherein said continuously reduced impurity concentration includes a plurality of impurity species.

### Claim 13 (depends on 9)

The semiconductor structure of claim 9, wherein said group III-V device layer includes at least one of a III-Nitride field-effect transistor (FET) and a III-Nitride high electron mobility transistor (HEMT).

### Claim 14

A method comprising:
fabricating a transition body having an impurity concentration that varies between a bottom surface and a top surface of said transition body such that a top surface impurity concentration of said transition body is less than or substantially equal to a bottom surface impurity concentration of said transition body;
fabricating a group III-V intermediate body having a bottom surface over said transition body;
fabricating a group III-V device layer over a top surface of said group III-V intermediate body;
wherein fabricating said group III-V intermediate body comprises forming a continuously reduced impurity concentration such that a higher impurity concentration at said bottom surface is continuously reduced to a lower impurity concentration at said top surface;
said lower impurity concentration occurring at a depth below said top surface and remaining substantially constant from said depth to said top surface.

### Claim 15 (depends on 14)

The method of claim 14, wherein fabricating said group III-V intermediate body comprises selectively reducing a growth rate of said group III-V intermediate body from a higher growth rate at said bottom surface to a lower growth rate at said top surface.

### Claim 16 (depends on 14)

The method of claim 14, wherein fabricating said group III-V intermediate body comprises selectively increasing a growth temperature of said group III-V intermediate body from a lower growth temperature at said bottom surface to a higher growth temperature at said top surface.

### Claim 17 (depends on 14)

The method of claim 14, wherein said group III-V intermediate body comprises a compositionally graded III-Nitride body having a first III-Nitride composition at said bottom surface and a second III-Nitride composition above said bottom surface.

### Claim 18 (depends on 14)

The method of claim 14, wherein fabricating said transition body includes fabricating a group III-V transition structure having said impurity concentration that varies.

### Claim 19 (depends on 18)

The method of claim 18, wherein said impurity concentration of said transition body varies in a step-wise fashion from said bottom surface impurity concentration to said top surface impurity concentration.

### Claim 20 (depends on 14)

The method of claim 14, wherein forming said continuously reduced impurity concentration comprises forming a continuously reduced carbon concentration.