# US 9,437,674 B2 · Insulating trench forming method

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- Number: US 9,437,674 B2
- Document ID: US9437674B2
- Status: Granted
- Kind: B2
- Application number: 14/660,601
- Filed: 2015-03-17
- Published: 2015-10-15
- Granted: 2016-09-06
- Earliest claimed: 2014-04-11
- Assignees: STMicroelectronics (Crolles 2) SAS
- Applicants: STMicroelectronics (Crolles 2) SAS
- Inventors: Nayera Ahmed; François Roy
- Web page: https://patentgrep.com/patent/US9437674B2

## CPC

- H10D 62/115: {Dielectric isolations, e.g. air gaps}
- H10W 10/012: {using local oxidation of silicon [LOCOS]}
- H10W 10/0121: {in regions recessed from the surface, e.g. in trenches or grooves}
- H10W 10/014: {using trench refilling with dielectric materials, e.g. shallow trench isolations}
- H10W 10/0142: {the dielectric materials being chemical transformed from non-dielectric materials}
- H10W 10/0143: {comprising concurrently refilling multiple trenches having different shapes or dimensions}
- H10W 10/041: {of isolation regions comprising polycrystalline semiconductor materials}
- H10W 10/13: formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10W 10/40: Isolation regions comprising polycrystalline semiconductor materials
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method of manufacturing an insulating trench including the successive steps of: a) forming, on a semiconductor substrate, a first masking structure including a layer of a first selectively-etchable material and etching a trench into the substrate; b) forming an insulating coating on the trench walls and filling the trench with doped polysilicon; c) forming a silicon oxide plug penetrating into the trench substantially all the way to the upper surface of the substrate and protruding above the upper surface of the substrate; and d) removing the layer of the first material.

## Claims

### Claim 1

A method of manufacturing an insulating trench, the method comprising:
forming a trench having trench walls in a surface of a substrate;
covering the trench walls with an insulating material;
filling the trench with doped polysilicon; and
forming a silicon oxide plug over the polysilicon, an upper surface of the silicon oxide plug located above the surface of the substrate and a lower surface of the silicon oxide plug being substantially at or below the surface of the substrate; and
forming an insulator layer on the surface of the substrate and the upper surface of the silicon oxide plug.

### Claim 2 (depends on 1)

The method of claim 1, wherein the lower surface of the silicon oxide plug is below the surface of the substrate.

### Claim 3 (depends on 1)

The method of claim 1, wherein forming the silicon oxide plug comprises:
selectively etching the polysilicon; and
performing a thermal oxidation to form said oxide plug.

### Claim 4 (depends on 1)

The method of claim 1, wherein forming the silicon oxide plug comprises:
selectively etching the polysilicon;
depositing silicon oxide over the polysilicon; and
planarizing the silicon oxide.

### Claim 5 (depends on 1)

The method of claim 1, further comprising:
forming, on the surface of the substrate, a first masking structure having a layer of a selectively etchable first material, the first material being silicon nitride.

### Claim 6 (depends on 1)

The method of claim 1, wherein the trench is a first trench, and after forming the silicon oxide plug, the method further comprising
forming a second trench in the surface of the substrate, the second trench having a smaller depth than the first trench;
depositing a second insulating material to fill said second trench; and
planarizing exposed surface to a same level of said oxide plug.

### Claim 7 (depends on 6)

The method of claim 6, wherein said second insulating material is silicon oxide.

### Claim 8 (depends on 1)

The method of claim 1, further comprising:
depositing, on the insulator layer, at least one layer of a conductive gate stack; and
masking and etching the at least one layer of the conductive gate stack to form a gate.

### Claim 9 (depends on 1)

The method of claim 1, wherein the covering of the trench walls with the insulating material includes forming a thermal silicon oxide layer, a silicon oxide layer, and a silicon nitride layer.

### Claim 10 (depends on 1)

The method of claim 1, wherein the filling of the trench includes depositing a doped polysilicon layer in the trench and over the surface of the substrate.

### Claim 11 (depends on 10)

The method of claim 10, wherein the depositing of the doped polysilicon layer is followed by planarizing the doped polysilicon layer.

### Claim 12

An insulating structure formed in a semiconductor substrate, the insulating structure comprising:
a trench having trench walls formed in a first surface of the substrate;
an insulating material covering the trench walls;
doped polysilicon in the trench; and
a silicon oxide plug formed over the polysilicon, an upper surface of the silicon oxide plug located above the first surface of the substrate, and a lower surface of the silicon oxide plug being below the first surface of the substrate and in the trench.

### Claim 13 (depends on 12)

The insulating structure of claim 12, wherein the lower surface of the silicon oxide plug is below the surface of the substrate.

### Claim 14 (depends on 12)

The insulating structure of claim 12, wherein the trench has a depth in the substrate that is greater than 2 μm.

### Claim 15 (depends on 12)

The insulating structure of claim 12, wherein the insulating material covering the trench walls includes a plurality of insulating materials.

### Claim 16 (depends on 15)

The insulating structure of claim 15, wherein the plurality of insulating materials includes a thermal silicon oxide layer, a silicon oxide layer, and a silicon nitride layer.

### Claim 17

A semiconductor structure comprising:
a semiconductor substrate having a surface;
a plurality of trenches having sidewalls formed in the substrate at the first surface, the plurality of trenches being spaced apart from each other;
a first layer of insulating material conforming to the sidewalls of a first trench of the plurality of trenches;
doped polysilicon in the first trench over at least a portion of the first layer of insulating material;
a silicon oxide plug formed over the polysilicon in the first trench, an upper surface of the silicon oxide plug located above the substrate and a lower surface of the silicon oxide plug being below the first surface of the substrate;
a second layer of insulating material formed over the silicon oxide plug and
a conductive gate located between two adjacent trenches.

### Claim 18 (depends on 17)

The semiconductor structure of claim 17, wherein the lower surface of the silicon oxide plug is below the surface of the substrate.

### Claim 19 (depends on 17)

The semiconductor structure of claim 17, wherein the at least one insulating materials includes a plurality of insulting materials including a thermal silicon oxide layer, a silicon oxide layer, and a silicon nitride layer.

### Claim 20 (depends on 17)

The semiconductor structure of claim 17, further comprising insulating material filling a second trench of the plurality of trenches, the first trench having a first depth, the second trench having a second depth that is smaller than the first depth.

### Claim 21

A method of manufacturing an insulating trench, the method comprising:
forming a trench having trench walls in a surface of a substrate;
covering the trench walls with an insulating material;
filling the trench with doped polysilicon;
forming a silicon oxide plug over the polysilicon, a first surface of the silicon oxide plug located above the surface of the substrate and a second surface of the silicon oxide plug being substantially at or below the surface of the substrate, the forming of the silicon oxide plug including:
performing a thermal oxidation to form said oxide plug; or
depositing silicon oxide over the polysilicon and planarizing the silicon oxide.

### Claim 22 (depends on 21)

The method of claim 21, further comprising:
forming a masking layer on the surface of the substrate; and
removing the masking layer subsequent to the forming of the silicon oxide plug.

### Claim 23

A method of manufacturing an insulating trench, the method comprising:
forming, on a surface of the substrate, a masking structure having a layer of a selectively etchable first material, the first material being silicon nitride;
forming a trench having trench walls in the first masking structure and the substrate;
covering the trench walls with an insulating material;
filling the trench with doped polysilicon; and
forming a silicon oxide plug over the polysilicon, a first surface of the silicon oxide plug located above the surface of the substrate and a second surface of the silicon oxide plug being substantially at or below the surface of the substrate.

### Claim 24 (depends on 23)

The method of claim 23, further comprising removing the masking structure.

### Claim 25

A method of manufacturing an insulating trench, the method comprising:
forming a first trench having trench walls in a surface of a substrate;
covering the trench walls with a first insulating material;
filling the trench with doped polysilicon; and
forming a silicon oxide plug over the polysilicon, an upper surface of the silicon oxide plug located above the surface of the substrate and a lower surface of the silicon oxide plug being substantially at or below the surface of the substrate;
forming a second trench in the surface of the substrate, the second trench having a smaller depth than the first trench;
depositing a second insulating material to fill the second trench; and
planarizing the second insulating material to have an upper surface that is coplanar with the upper surface of the silicon oxide plug.

### Claim 26 (depends on 25)

The method of claim 25, further comprising forming an insulating layer on the upper surface of the silicon oxide plug.