# US 9,437,669 B2 · Semiconductor device

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- Number: US 9,437,669 B2
- Document ID: US9437669B2
- Status: Granted
- Kind: B2
- Application number: 14/617,572
- Filed: 2015-02-09
- Published: 2015-08-13
- Granted: 2016-09-06
- Earliest claimed: 2014-02-13
- Assignees: Sii Semiconductor Corporation
- Applicants: Seiko Instruments Inc.
- Inventors: Hirofumi Harada; Masaru Akino
- Web page: https://patentgrep.com/patent/US9437669B2

## CPC

- H10D 1/47: Resistors having no potential barriers
- H10D 84/209: {of only resistors}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor resistor circuit has resistor elements of a polycrystalline silicon thin film formed on an insulating film deposited on a semiconductor substrate. A high stress insulating film is formed on and covers the resistor elements and the insulating film exposed between the resistor elements. Metal wirings cover upper portions of the resistor elements. The high stress insulating film has a membrane stress that is higher than that of the metal wirings.

## Claims

### Claim 1

A semiconductor device, comprising:
a semiconductor substrate;
a first insulating film of a silicon oxide film formed on the semiconductor substrate;
a plurality of resistor elements of a polycrystalline silicon thin film formed on the first insulating film, the plurality of resistor elements being spaced from one another on the first insulating film and each of the plurality of resistor elements having a low concentration impurity region and a high concentration impurity region;
a high stress insulating film formed on and covering the plurality of resistor elements and the first insulating film exposed between the resistor elements;
a second insulating film covering a periphery of the high stress insulating film; and
a plurality of metal wirings covering the low concentration impurity region of the plurality of resistor elements, one end of each of the plurality of metal wirings being electrically connected to one end of the plurality of resistor elements,
wherein the high stress insulating film is formed in a region in which the plurality of resistor elements are arranged and which is larger than a region of the plurality of metal wirings, and the high stress insulating film has one of a compressive stress and a tensile stress that is higher than one of a compressive stress and a tensile stress of the each of the plurality of metal wirings.

### Claim 2 (depends on 1)

A semiconductor device according to claim 1, further comprising a second high stress insulating film formed between the first insulating film and the plurality of resistor elements, the second high stress insulating film having one of a compressive stress and a tensile stress that is higher than the one of the compressive stress and the tensile stress of the each of the plurality of metal wirings.

### Claim 3 (depends on 1)

A semiconductor device according to claim 1, wherein the high stress insulating film has one of a compressive stress of 500 MPa or more and a tensile stress of 500 MPa or more.

### Claim 4 (depends on 3)

A semiconductor device according to claim 3, wherein the high stress insulating film comprises one of a single-layer film formed of any one of SiC, SiON, and SiCN and a multilayer film formed of a combination of different films.

### Claim 5 (depends on 3)

A semiconductor device according to claim 3, wherein the high stress insulating film comprises a silicon nitride film formed by low pressure CVD.

### Claim 6 (depends on 5)

A semiconductor device according to claim 5, wherein the high stress insulating film has a thickness of 0.15 μm or more.

### Claim 7 (depends on 1)

A semiconductor device according to claim 1, wherein the plurality of resistor elements are arranged in resistor groups, each resistor group contains plural resistor elements, and the metal wirings corresponding to the respective resistor groups have different areas.

### Claim 8 (depends on 1)

A semiconductor device according to claim 1, wherein the high stress insulating film is a single-layer film deposited on the plurality of resistor elements and on the first insulating film between the resistor element.

### Claim 9 (depends on 1)

A semiconductor device according to claim 1, wherein the high stress insulating film is a multi-layer film deposited on the plurality of resistor elements and on the first insulating film between the resistor element.

### Claim 10 (depends on 1)

A semiconductor device according to claim 1, wherein the high stress insulating film extends continuously without interruption over all of the resistor elements.