# US 9,437,658 B2 · Fully isolated selector for memory device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,437,658 B2 - Document ID: US9437658B2 - Status: Granted - Kind: B2 - Application number: 14/451,664 - Filed: 2014-08-05 - Published: 2016-02-11 - Granted: 2016-09-06 - Earliest claimed: 2014-08-05 - Assignees: SanDisk Technologies LLC - Applicants: SanDisk 3D LLC - Inventors: Yukihiro Sakotsubo - Web page: https://patentgrep.com/patent/US9437658B2 ## CPC - H10B 63/84: {arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays} - H10B 63/20: {comprising selection components having two electrodes, e.g. diodes} - H10B 63/22: {of the metal-insulator-metal type} - H10B 63/82: {the switching components having a common active material layer} - H10B 63/845: {the switching components being connected to a common vertical conductor} - H10N 70/841: {Electrodes} - H10N 70/24: {based on migration or redistribution of ionic species, e.g. anions, vacancies} - H10N 70/245: {the species being metal cations, e.g. programmable metallization cells} - H10N 70/823: {adapted for essentially horizontal current flow, e.g. bridge type devices} - H10N 70/8833: {Binary metal oxides, e.g. TaOx} - H10B: ELECTRONIC MEMORY DEVICES - H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR ## Abstract A monolithic, three-dimensional memory device includes a substrate and a plurality of electrically conductive word lines over a major surface of the substrate. An electrically conductive bit line extends in a direction substantially perpendicular to the major surface of the substrate and adjacent to each of the plurality of word lines, and a non-volatile memory element material is located between the bit line and each of the plurality of word lines. A plurality of middle electrodes comprising an electrically conductive material are located between the bit line and each of the plurality of word lines, wherein the plurality of middle electrodes are discrete electrodes which are isolated from one another in at least the second direction. ## Claims ### Claim 1 A monolithic, three-dimensional memory device, comprising: a substrate having a major surface; a plurality of electrically conductive word lines over the major surface of the substrate, wherein each word line is elongated in a first direction that is substantially parallel to the major surface of the substrate and the plurality of word lines are spaced apart from one another in a second direction that is substantially perpendicular to the major surface of the substrate, and an electrically insulating material is located between each of the spaced apart word lines; an electrically conductive bit line extending in a direction substantially perpendicular to the major surface of the substrate and adjacent to each of the plurality of word lines; a non-volatile memory element material located between the bit line and each of the plurality of word lines; and a plurality of middle electrodes comprising an electrically conductive material located between the bit line and each of the plurality of word lines, wherein the plurality of middle electrodes are discrete electrodes which are isolated from one another in at least the second direction. ### Claim 2 (depends on 1) The device of claim 1, further comprising: a non-linear element located between the bit line and each of the plurality of word lines. ### Claim 3 (depends on 2) The device of claim 2, wherein each of the middle electrodes is adjacent to the non-volatile memory element material and electrically connects the non-volatile memory element material in series with the non-linear element. ### Claim 4 (depends on 2) The device of claim 2, wherein the non-linear element comprises a Schottky junction. ### Claim 5 (depends on 2) The device of claim 2, wherein the non-linear element comprises a tunnel junction. ### Claim 6 (depends on 2) The device of claim 2, wherein the non-linear element comprises a metal-insulator-metal (MIM) junction. ### Claim 7 (depends on 2) The device of claim 2, wherein the non-linear element is formed by providing a layer of insulating material over at least one side surface of the bit line. ### Claim 8 (depends on 1) The device of claim 1, wherein the plurality of middle electrodes are located between the non-volatile memory element material and the bit line. ### Claim 9 (depends on 1) The device of claim 1, wherein the plurality of middle electrodes are located between the non-volatile memory element and the word lines. ### Claim 10 (depends on 1) The device of claim 1, wherein the bit line comprises a generally pillar-shaped structure having at least one side surface, and the non-volatile memory element material comprises a continuous layer that extends over a side surface of the bit line and adjacent to each of the plurality of word lines. ### Claim 11 (depends on 10) The device of claim 10, wherein: the layer of non-volatile memory element material comprises a plurality of clam shape portions adjacent to each of the plurality of word lines; each of the clam shape portions surrounds a respective one of the plurality of middle electrodes on three sides; the bit line comprises the generally pillar-shaped structure having a substantially rectangular cross section; the non-linear element is located adjacent to all four sidewalls of the substantially-pillar shaped bit line; and the a plurality of middle electrodes are located adjacent to two of four sidewalls of the substantially-pillar shaped bit lines. ### Claim 12 (depends on 1) The device of claim 1, wherein the monolithic, three-dimensional memory device comprises a ReRAM memory device. ### Claim 13 (depends on 1) The device of claim 1, wherein the electrically conductive bit line comprises a local bit line that is electrically connected to a global bit line via a select transistor. ### Claim 14 (depends on 1) The device of claim 1, wherein the non-volatile memory element material comprises a material in which discrete regions of the material located between the bit line and each of the plurality of word lines are controllably alternated between a more conductive state and a less conductive state by appropriate voltages applied to the bit line and the respective word line. ### Claim 15 (depends on 14) The device of claim 14, wherein the non-volatile memory element material comprises a metal oxide.