# US 9,437,630 B2 · Semiconductor photomultiplier > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,437,630 B2 - Document ID: US9437630B2 - Status: Granted - Kind: B2 - Application number: 14/283,006 - Filed: 2014-05-20 - Published: 2015-11-26 - Granted: 2016-09-06 - Earliest claimed: 2014-05-20 - Assignees: SensL Technologies Ltd. - Applicants: SensL Technologies Ltd. - Inventors: Liam Wall; Kevin O'Neill; John Carlton Jackson - Web page: https://patentgrep.com/patent/US9437630B2 ## CPC - H10F 39/107: {having multiple elements covered by H10F30/00 in a repetitive configuration, e.g. radiation detectors comprising photodiode arrays} - H10F 30/225: the potential barrier working in avalanche mode, e.g. avalanche photodiodes - H10F 30/29: the devices being sensitive to radiation having very short wavelengths, e.g. X-rays, gamma-rays or corpuscular radiation - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION ## Abstract The present disclosure relates to photon detectors. In particular, the present disclosure relates to high sensitivity photon detectors such as semiconductor photomultipliers. A semiconductor photomultiplier is described which comprises an array of interconnected photosensitive microcells; and at least one dark count rate (DCR) suppression element associated with the array. ## Claims ### Claim 1 A semiconductor photomultiplier comprising: an array of interconnected photosensitive microcells; and a plurality of dark count rate (DCR) suppression elements associated with the array; wherein each DCR suppression element is a dummy electrical component that is not coupled to a power track and is electrically isolated from the array of interconnected photosensitive microcells; wherein the array of interconnected photosensitive microcells and the DCR suppression elements are configured to simultaneously receive light. ### Claim 2 (depends on 1) A semiconductor photomultiplier as claimed in claim 1, wherein the at least one DCR suppression element comprises a photosensitive element. ### Claim 3 (depends on 2) A semiconductor photomultiplier as claimed in claim 2, wherein the at least one DCR suppression element comprises a microcell. ### Claim 4 (depends on 3) A semiconductor photomultiplier as claimed in claim 3, wherein each microcell comprises a photodiode. ### Claim 5 (depends on 4) A semiconductor photomultiplier as claimed in claim 4, wherein each microcell comprises a resistor coupled in series to the photodiode. ### Claim 6 (depends on 5) A semiconductor photomultiplier as claimed in claim 5, further comprising a capacitive element. ### Claim 7 (depends on 3) A semiconductor photomultiplier as claimed in claim 3, wherein each microcell comprises a circuit element configured to limit avalanche current of a diode. ### Claim 8 (depends on 1) A semiconductor photomultiplier as claimed in claim 1, wherein the at least one DCR suppression element comprises a photosensitive cell which has the same layout as an individual interconnected photosensitive microcell. ### Claim 9 (depends on 8) A semiconductor photomultiplier as claimed in claim 8, wherein the photosensitive cells define an active area and the DCR suppression elements define an inactive area. ### Claim 10 (depends on 9) A semiconductor photomultiplier as claimed in claim 9, wherein the active area has a footprint shaped to conform with the footprint of a cross sectional area of an optical fibre. ### Claim 11 (depends on 10) A semiconductor photomultiplier as claimed in claim 10, wherein the active area has a circular footprint for facilitating coupling with the optical fibre. ### Claim 12 (depends on 1) A semiconductor photomultiplier as claimed in claim 1, wherein the plurality of DCR suppression elements are located in the array. ### Claim 13 (depends on 1) A semiconductor photomultiplier as claimed in claim 1, wherein the plurality of DCR suppression elements defines a discontinuous configuration which at least partially surrounds the array. ### Claim 14 (depends on 1) A semiconductor photomultiplier as claimed in claim 1, wherein the plurality of DCR suppression elements are dummy elements which are formed by photolithographic mask options to isolate or otherwise alter the electrical properties of chosen microcells to render them inactive. ### Claim 15 (depends on 1) A semiconductor photomultiplier as claimed in claim 1, wherein at least some of the plurality of DCR suppression elements are interconnected such that the at least some of the plurality of DCR suppression elements can be selected to be dummy elements while the photosensitive microcells are active. ### Claim 16 (depends on 1) A semiconductor photomultiplier as claimed in claim 1, wherein the plurality of DCR suppression elements define sub-arrays which are independently controllable. ### Claim 17 (depends on 16) A semiconductor photomultiplier as claimed in claim 16, wherein each sub-array is operably coupled between a cathode node and an anode node. ### Claim 18 (depends on 17) A semiconductor photomultiplier as claimed in claim 17, wherein at least two sub-arrays are operably coupled between different cathode and anode nodes. ### Claim 19 (depends on 1) A semiconductor photomultiplier as claimed in claim 1, wherein each DCR suppression element defines a continuous configuration. ### Claim 20 (depends on 1) A semiconductor photomultiplier as claimed in claim 1, wherein each DCR suppression element comprises a buried trench filled with an insulating material. ### Claim 21 (depends on 1) A semiconductor photomultiplier as claimed in claim 1, further comprising a plurality of discrete arrays of microcells. ### Claim 22 (depends on 21) A semiconductor photomultiplier as claimed in claim 21, wherein each DCR suppression element is provided by spacing the discrete arrays apart from each other by a distance which is less than the width of a single microcell. ### Claim 23 (depends on 1) A semiconductor photomultiplier as claimed in claim 1, wherein the interconnected photosensitive cells are arranged in a grid configuration. ### Claim 24 (depends on 23) A semiconductor photomultiplier as claimed in claim 23, wherein one or more additional DCR elements are associated with the corners of the grid configuration. ### Claim 25 (depends on 1) A semiconductor photomultiplier as claimed in claim 1, wherein the DCR suppression elements are arranged adjacent the outer periphery of the grid configuration. ### Claim 26 (depends on 1) A semiconductor photomultiplier as claimed in claim 1, wherein each photosensitive cell comprises an avalanche photodiode. ### Claim 27 (depends on 26) A semiconductor photomultiplier as claimed in claim 26, wherein each interconnected photosensitive cell comprises an quench resistor coupled in series to the avalanche photodiode. ### Claim 28 (depends on 27) A semiconductor photomultiplier as claimed in claim 27, wherein each interconnected photosensitive cell further comprises a capacitive element. ### Claim 29 A substrate comprising: an array of interconnected photosensitive microcells; and a plurality of dark count rate (DCR) suppression elements associated with the array; wherein each DCR suppression element is a dummy electrical component that is not coupled to a power track and is electrically isolated from the array of interconnected photosensitive microcells; wherein the array of interconnected photosensitive microcells and the DCR suppession elements are configured to simultaneously receive light. ### Claim 30 A method of fabricating a semiconductor photomultiplier; the method comprising: providing a plurality of interconnected photosensitive cells on a substrate, and providing a pluality of DCR suppression elements associated with the array; wherein each DCR suppression element is a dummy electrical component which is not coupled to a power track and is electrically isolated from the array of interconnected photosensitive microcells; wherein the array of interconnected photosensitive microcells and the DCR suppession elements are configured to simultaneously receive light. ### Claim 31 A semiconductor photomultiplier comprising: an array of interconnected photosensitive microcells operably coupled between cathode and anode power tracks; and a plurality of dark count rate (DCR) suppression elements associated with the array; wherein each DCR suppression element is a dummy electrical component that is electrically isolated from the cathode and anode power tracks; wherein the array of interconnected photosensitive microcells and the DCR suppession elements are configured to simultaneously receive light.