# US 9,437,570 B2 · Power converter package with an integrated output inductor

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- Number: US 9,437,570 B2
- Document ID: US9437570B2
- Status: Granted
- Kind: B2
- Application number: 14/538,483
- Filed: 2014-11-11
- Published: 2015-06-11
- Granted: 2016-09-06
- Earliest claimed: 2013-12-05
- Assignees: Infineon Technologies Americas Corp.
- Applicants: Infineon Technologies Americas Corp.
- Inventors: Eung San Cho; Kevin Moody; Parviz Parto
- Web page: https://patentgrep.com/patent/US9437570B2

## CPC

- H02M 3/155: using semiconductor devices only
- H10W 70/40: Leadframes
- H10W 70/481: {for devices being provided for in groups H10D8/00 - H10D48/00}
- H10W 90/811: {Multiple chips on leadframes}
- H10W 72/07554: {changes in dispositions}
- H10W 72/534: {being rectangular}
- H10W 72/5368: {the bond wires having helical loops}
- H10W 72/5445: {being orthogonal to a side surface of the chip, e.g. parallel arrangements}
- H10W 72/547: {Dispositions of multiple bond wires}
- H10W 72/5522: {comprising gold [Au]}
- H10W 72/5524: {comprising aluminium [Al]}
- H10W 72/5525: {comprising copper [Cu]}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/738: {between a chip and a stacked discrete passive device}
- H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

In one implementation, a power semiconductor package includes a conductive carrier including a switch node segment and a power output segment. The power semiconductor package also includes an integrated output inductor stacked over the conductive carrier and configured to couple the switch node segment to the power output segment. The power semiconductor package further includes a power stage stacked over the integrated output inductor.

## Claims

### Claim 1

A power semiconductor package comprising:
a conductive carrier including a switch node segment and a power output segment;
an integrated output inductor stacked over said conductive carrier and configured to couple said switch node segment to said power output segment;
a power stage stacked over said integrated output inductor.

### Claim 2 (depends on 1)

The power semiconductor package of claim 1, wherein said integrated output inductor includes a switch node terminal coupled to a first end of a winding in said integrated output inductor, said switch node terminal situated over and coupled to said switch node segment.

### Claim 3 (depends on 1)

The power semiconductor package of claim 1, wherein said integrated output inductor includes a power output terminal coupled to a second end of said winding in said integrated output inductor, said power output terminal situated over and coupled to said power output segment.

### Claim 4 (depends on 1)

The power semiconductor package of claim 1, wherein said power stage is coupled to a switch node terminal of said integrated output inductor by a first wire bond connected to said switch node segment.

### Claim 5 (depends on 1)

The power semiconductor package of claim 1, wherein said power stage is further coupled to a power input terminal of said power semiconductor package by a second wire bond connected to a power input segment of said conductive carrier.

### Claim 6 (depends on 1)

The power semiconductor package of claim 1, wherein said power stage includes at least one group III-V power transistor.

### Claim 7 (depends on 1)

The power semiconductor package of claim 1, wherein said power stage includes at least one GaN power transistor.

### Claim 8 (depends on 1)

The power semiconductor package of claim 1, wherein said power stage is coupled to said integrated output inductor using a die attach material.

### Claim 9

A power semiconductor package comprising:
a conductive carrier including a switch node segment and a power output segment;
an integrated output inductor stacked over said conductive carrier;
said integrated output inductor having a switch node terminal coupled to a first end of a winding in said integrated output inductor, said switch node terminal situated over and coupled to said switch node segment;
said integrated output inductor having a power output terminal coupled to a second end of said winding in said integrated output inductor, said power output terminal situated over and coupled to said power output segment;
a power stage stacked over said integrated output inductor.

### Claim 10 (depends on 9)

The power semiconductor package of claim 9, wherein said power stage is coupled to a switch node terminal of said integrated output inductor by a first wire bond connected to said switch node segment.

### Claim 11 (depends on 9)

The power semiconductor package of claim 9, wherein said power stage is further coupled to a power input terminal of said power semiconductor package by a second wire bond connected to a power input segment of said conductive carrier.

### Claim 12 (depends on 9)

The power semiconductor package of claim 9, wherein said power stage includes at least one group III-V power transistor.

### Claim 13 (depends on 9)

The power semiconductor package of claim 9, wherein said power stage includes at least one GaN power transistor.

### Claim 14 (depends on 9)

The power semiconductor package of claim 9, wherein said power stage is coupled to said integrated output inductor using a die attach material.

### Claim 15

A power semiconductor package comprising:
a conductive carrier including a switch node segment and a power output segment;
an integrated output inductor stacked over said conductive carrier and configured to couple said switch node segment to said power output segment;
a power stage stacked over said integrated output inductor;
said power stage being coupled to a switch node terminal of said integrated output inductor by a first wire bond connected to said switch node segment;
said power stage being further coupled to a power input terminal of said power semiconductor package by a second wire bond connected to a power input segment of said conductive carrier.

### Claim 16 (depends on 15)

The power semiconductor package of claim 15, wherein said integrated output inductor includes a switch node terminal coupled to a first end of a winding in said integrated output inductor, said switch node terminal situated over and coupled to said switch node segment.

### Claim 17 (depends on 15)

The power semiconductor package of claim 15, wherein said integrated output inductor includes a power output terminal coupled to a second end of a winding in said integrated output inductor, said power output terminal situated over and coupled to said power output segment.

### Claim 18 (depends on 15)

The power semiconductor package of claim 15, wherein said power stage includes at least one group III-V power transistor.

### Claim 19 (depends on 15)

The power semiconductor package of claim 15, wherein said power stage includes at least one GaN power transistor.

### Claim 20 (depends on 15)

The power semiconductor package of claim 15, wherein said power stage is coupled to said integrated output inductor using a die attach material.