# US 9,437,540 B2 · Additional etching to increase via contact area

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- Number: US 9,437,540 B2
- Document ID: US9437540B2
- Status: Granted
- Kind: B2
- Application number: 14/484,589
- Filed: 2014-09-12
- Published: 2016-03-17
- Granted: 2016-09-06
- Earliest claimed: 2014-09-12
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Pei-Yi Lin; Chung-Ju Lee; Shau-Lin Shue
- Web page: https://patentgrep.com/patent/US9437540B2

## CPC

- H10W 20/425: {Barrier, adhesion or liner layers}
- H10P 50/267: {using plasmas}
- H10P 50/283: {by chemical means}
- H10P 50/667: {by liquid etching only}
- H10P 95/00: Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- H10W 20/033: {in openings in dielectrics}
- H10W 20/037: {the barrier, adhesion or liner layers being on top of a main fill metal}
- H10W 20/056: {by filling conductive material into holes, grooves or trenches}
- H10W 20/064: {by modifying the conductivity of conductive parts, e.g. by alloying}
- H10W 20/081: {by forming openings in the dielectric parts}
- H10W 20/083: {the openings being via holes penetrating underlying conductors}
- H10W 20/088: {involving partial etching of via holes}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 20/42: Vias, e.g. via plugs
- H10P 14/6314: {of a metallic layer}
- H10W 20/47: comprising two or more dielectric layers having different properties, e.g. different dielectric constants
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

An integrated circuit structure includes a dielectric layer, and a conductive line in the dielectric layer. The conductive line has a first top surface and a second top surface lower than the first top surface, and a sidewall connecting the first top surface to the second top surface. A via includes a portion overlying the second top surface of the conductive line. The via is electrically coupled to the conductive line through the second top surface and the sidewall of the conductive line.

## Claims

### Claim 1

A method comprising:
forming a conductive line in a first dielectric layer;
forming a second dielectric layer over the conductive line and the first dielectric layer;
performing a first etching step to etch the second dielectric layer to form an opening extending into the second dielectric layer and further into the first dielectric layer, with at least a portion of the opening substantially aligned to the conductive line, wherein the opening generated by the first etching step has a bottom lower than a top surface of the conductive line;
performing a second etching step to remove a corner portion of the conductive line; and
filling the opening with a conductive material to form a via electrically coupled to the conductive line.

### Claim 2 (depends on 1)

The method of claim 1 further comprising forming a metal cap over an exposed surface of the conductive line, wherein a top surface of a portion of the metal cap is exposed by the first etching step, and the portion of the metal cap is removed in the second etching step, wherein the via is over and contacts the metal cap.

### Claim 3 (depends on 1)

The method of claim 1, wherein the removing the corner portion of the conductive line comprises:
oxidizing the corner portion of the conductive line to form an oxide region; and
etching the oxide region.

### Claim 4 (depends on 1)

The method of claim 1, wherein the first etching step comprises a dry etching process, and the second etching step comprises a wet etching process.

### Claim 5 (depends on 1)

The method of claim 1, wherein the removing the corner portion of the conductive line comprises a wet etching process.

### Claim 6 (depends on 1)

The method of claim 1, wherein in the first etching step, the corner portion of the conductive line is not etched, and a top tip of the corner portion is exposed to the opening.

### Claim 7

A method comprising:
forming a conductive line in a first dielectric layer, with a first top surface of the conductive line substantially coplanar with a second top surface of the first dielectric layer;
forming a second dielectric layer over the conductive line and the first dielectric layer;
performing a first etching step to etch the second dielectric layer and the first dielectric layer to form an opening extending into the first dielectric layer;
performing a second etching step to remove a corner portion of the conductive line, wherein the opening is expanded by the second etching step; and
selectively forming a conductive cap on exposed portions of the conductive line, wherein a first portion of a lower portion of the opening lower than a top surface of the conductive line is filled by the conductive cap, and a second portion of the lower portion of the opening remains unfilled by the conductive cap; and
filling the opening with a conductive material to form a via electrically coupled to the conductive line.

### Claim 8 (depends on 7)

The method of claim 7 further comprising:
performing an oxidation on the corner portion of the conductive line to form an oxide region, wherein the second etching step comprises removing the oxide region; and
forming a dielectric etch stop layer over the conductive line, wherein the oxidation is performed through an additional opening in the dielectric etch stop layer.

### Claim 9 (depends on 8)

The method of claim 8, wherein the oxide region has an edge substantially vertically aligned to a respective edge of the additional opening in the dielectric etch stop layer.

### Claim 10 (depends on 7)

The method of claim 7, wherein the via extends beyond a sidewall of the conductive line.

### Claim 11 (depends on 7)

The method of claim 7, wherein the via is between two remaining portions of the conductive line, with top surfaces of the two remaining portions of the conductive line being portions of the first top surface.

### Claim 12 (depends on 7)

The method of claim 7, wherein the first etching step comprises a dry etching, and the second etching step comprises a wet etching process.

### Claim 13 (depends on 7)

The method of claim 7, wherein the opening generated by the first etching step has a bottom lower than a top surface of the conductive line.

### Claim 14 (depends on 7)

The method of claim 7, wherein the second etching step further etches a portion of the second dielectric layer in contact with a sidewall of the conductive line.

### Claim 15

A method comprising:
forming a first conductive line in a first dielectric layer;
forming a first metal cap over and contacting the first conductive line;
forming an etch stop layer over the first metal cap and the first dielectric layer;
forming a second dielectric layer over the etch stop layer;
performing a first etching step to etch the second dielectric layer, the etch stop layer, and the first dielectric layer to form a trench and a via opening underlying the trench, wherein a portion of the first metal cap is exposed to the via opening and the trench, and a portion of the first dielectric layer remains between a bottom portion of the via opening and a sidewalls of the first conductive line;
performing a second etching step to remove a portion of the first metal cap, a portion of the first conductive line, and the portion of the first dielectric layer to form a recess in the first metal cap and the first conductive line, with the recess joined to the via opening and the trench; and
filling the trench and the via opening with a conductive material to form a second conductive line and a via, respectively.

### Claim 16 (depends on 15)

The method of claim 15, wherein the second etching step comprises:
oxidizing the portion of the first metal cap and the portion of the first conductive line to form an oxide region; and
selectively etching the oxide region.

### Claim 17 (depends on 15)

The method of claim 15, wherein the removing the portion of the first metal cap and the portion of the first conductive line comprises etching the portion of the first metal cap and the portion of the first conductive line through the trench and the via opening.

### Claim 18 (depends on 15)

The method of claim 15 further comprising selectively plating a second metal cap in the recess.

### Claim 19 (depends on 15)

The method of claim 15, wherein the portion of the first metal cap comprises a corner portion of the first metal cap, and the via opening has a portion misaligned from the first conductive line.

### Claim 20 (depends on 15)

The method of claim 15, wherein the portion of the first metal cap removed in the second etching step is a middle portion of the first metal cap, and the method further comprises forming a second metal cap in the recess.