# US 9,437,537 B2 · Semiconductor device and method of manufacturing the same

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- Number: US 9,437,537 B2
- Document ID: US9437537B2
- Status: Granted
- Kind: B2
- Application number: 13/571,524
- Filed: 2012-08-10
- Published: 2013-10-17
- Granted: 2016-09-06
- Earliest claimed: 2012-04-17
- Assignees: SK hynix Inc.
- Applicants: Hyun Sub Kim; Sung Bo Shim
- Inventors: Hyun Sub Kim; Sung Bo Shim
- Web page: https://patentgrep.com/patent/US9437537B2

## CPC

- H10W 20/40: Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10P 50/71: {using masks for conductive or resistive materials}
- H10P 76/4085: {characterised by the processes involved to create the masks}
- H10W 20/43: Layouts of interconnections
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device including conductive lines configured to include first lines extending generally in parallel in a first direction and second lines extending generally in parallel in a second direction to intersect the first direction from the respective ends of the first lines and each second line having a width wider than the first line, and dummy patterns formed between the second lines.

## Claims

### Claim 1

A semiconductor device, comprising:
conductive lines configured to include first lines extending generally in parallel in a first direction and second lines extending generally in parallel in a second direction to intersect the first direction from respective ends of the first lines;
dummy patterns formed generally between the second lines; and
a contact plug
wherein each second line has a width wider than the first line, such that the contact plug is aligned on one of the second lines.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the width of the second line is at least twice the width of the first line.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the second lines comprise first patterns extended in the second direction from the ends of the first lines and second patterns formed on sidewalls of the first patterns.

### Claim 4 (depends on 3)

The semiconductor device of claim 3, wherein the first pattern and the second pattern have generally the same width.

### Claim 5 (depends on 3)

The semiconductor device of claim 3, wherein the first pattern and the second pattern have an identical width.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, wherein the dummy patterns are extended generally in the second direction generally between the second lines.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein the dummy patterns are irregularly disposed between the second lines.

### Claim 8 (depends on 1)

The semiconductor device of claim 1, further comprising a line group including four second lines; and the dummy patterns being disposed outside the line group, before a first outer line of the line group and after a last outer line of the line group.

### Claim 9 (depends on 1)

The semiconductor device of claim 1, wherein:
the first lines are arranged at first intervals, and
the second lines are arranged at second intervals.

### Claim 10 (depends on 8)

The semiconductor device of claim 8, wherein:
the first intervals are arranged at identical intervals, and
the second intervals are arranged at irregular intervals.

### Claim 11 (depends on 1)

The semiconductor device of claim 1, wherein:
an interval between the second lines is generally the same as an interval between the first lines, and
an interval between the second lines in areas where the dummy patterns are disposed is wider than the interval between the first lines.

### Claim 12 (depends on 1)

The semiconductor device of claim 1, further comprising:
a drain select line and a source select line each having a wider width than each of the conductive lines,
wherein the first lines of the conductive lines are disposed between the drain select line and the source select line.

### Claim 13 (depends on 1)

The semiconductor device of claim 1, wherein the dummy patterns are not disposed between the first lines.