# US 9,437,498 B2 · Method for the formation of different gate metal regions of MOS transistors > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,437,498 B2 - Document ID: US9437498B2 - Status: Granted - Kind: B2 - Application number: 14/636,778 - Filed: 2015-03-03 - Published: 2015-09-17 - Granted: 2016-09-06 - Earliest claimed: 2014-03-14 - Assignees: STMicroelectronics (Crolles 2) SAS - Applicants: Stmicroelectronics (Crolles 2) SAS - Inventors: Stéphane Zoll; Philippe Garnier; Olivier Gourhant; Vincent Joseph - Web page: https://patentgrep.com/patent/US9437498B2 ## CPC - H10D 84/038: {using silicon technology, e.g. SiGe} - H10D 64/01318: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN (comprising a layer of alloys of Si, Ge or C H10D64/01314)} - H10D 64/667: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers (having lateral variation H10D64/671)} - H10D 84/0135: {Manufacturing their gate conductors} - H10P 76/405: {characterised by their composition, e.g. multilayer masks} - H10P 95/90: Thermal treatments, e.g. annealing or sintering - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract A method is for forming at least two different gates metal regions of at least two MOS transistors. The method may include forming a metal layer on a gate dielectric layer; and forming a metal hard mask on the metal layer, with the hard mask having a composition different from that of the metal layer and covering a first region of the metal layer and leaving open a second region of the metal layer. The method may also include diffusion annealing the intermediate structure obtained in the prior steps such as to make the metal atoms of the hard mask diffuse into the first region, and removal of the hard mask. ## Claims ### Claim 1 A method for forming at least two different gate metal regions of at least two MOS transistors comprising: forming a metal layer with first and second regions on a gate dielectric layer; forming a metal hard mask on the metal layer, the metal hard mask having a composition different from that of the metal layer, and covering the first region of the metal layer to define an intermediate structure and leaving open the second region of the metal layer; diffusion annealing the intermediate structure to make metal atoms of the metal hard mask diffuse into the first region of the metal layer, with the diffusion annealing being carried out in presence of a gaseous mixture comprising ammonia for nitriding the second region of the metal layer so as to increase a nitrogen concentration thereof; and removing the metal hard mask. ### Claim 2 (depends on 1) The method according to claim 1, wherein diffusion annealing comprises rapid thermal annealing. ### Claim 3 (depends on 2) The method according to claim 2, wherein the rapid thermal annealing is carried out for a duration in a range between 1 second and 5 minutes. ### Claim 4 (depends on 2) The method according to claim 2, wherein the rapid thermal annealing is carried out in a temperature range between 400° C. and 1200° C. ### Claim 5 (depends on 1) The method according to claim 1, wherein the metal layer comprises titanium nitride. ### Claim 6 (depends on 1) The method according to claim 1, wherein the metal hard mask comprises a metal selected from the group consisting of aluminum, chrome, manganese, molybdenum, tungsten, tantalum, rhenium, ruthenium, cobalt, nickel, lanthanum, or an oxide of a metal from the group or a nitride of a metal from the group. ### Claim 7 A method for making an integrated circuit including at least two different gate metal regions of at least two MOS transistors, the method comprising: forming a metal layer with first and second regions on a gate dielectric layer above a substrate; forming a metal hard mask on the metal layer, the metal hard mask having a composition different from that of the metal layer, and covering the first region of the metal layer to define an intermediate structure and leaving open the second region of the metal layer; rapid thermal annealing the intermediate structure to make metal atoms of the metal hard mask diffuse into the first region of the metal layer, with the rapid thermal annealing being carried out in presence of a gaseous mixture comprising ammonia for nitriding the second region of the metal layer so as to increase a nitrogen concentration thereof; and removing the metal hard mask. ### Claim 8 (depends on 7) The method according to claim 7, wherein the rapid thermal annealing is carried out for a duration in a range between 1 second and 5 minutes in a temperature range between 400° C. and 1200° C. ### Claim 9 (depends on 7) The method according to claim 7, wherein the metal layer comprises titanium nitride. ### Claim 10 (depends on 7) The method according to claim 7, wherein the metal hard mask comprises a metal selected from the group consisting of aluminum, chrome, manganese, molybdenum, tungsten, tantalum, rhenium, ruthenium, cobalt, nickel, lanthanum, or an oxide of a metal from the group or a nitride of a metal from the group. ### Claim 11 A method for making an integrated circuit including at least two different gate metal regions of at least two MOS transistors, the method comprising: forming a metal layer with first and second regions on a gate dielectric layer; forming a hard mask on the metal layer, the hard mask having a composition different from that of the metal layer, and covering the first region of the metal layer and leaving open the second region of the metal layer; and diffusing atoms of the hard mask into the first region of the metal layer, with the diffusion being carried out in presence of a gaseous mixture comprising ammonia for nitriding the second region of the metal layer so as to increase a nitrogen concentration thereof. ### Claim 12 (depends on 11) The method according to claim 11, wherein diffusing comprises performing a rapid thermal annealing. ### Claim 13 (depends on 12) The method according to claim 12, wherein the rapid thermal annealing is carried out for a duration in a range between 1 second and 5 minutes in a temperature range between 400° C. and 1200° C. ### Claim 14 (depends on 11) The method according to claim 11, wherein the metal layer comprises titanium nitride. ### Claim 15 (depends on 11) The method according to claim 11, wherein the metal hard mask comprises a metal selected from the group consisting of aluminum, chrome, manganese, molybdenum, tungsten, tantalum, rhenium, ruthenium, cobalt, nickel, lanthanum, or an oxide of a metal from the group or a nitride of a metal from the group.