# US 9,437,471 B2 · Shallow trench isolations and method of manufacturing the same

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- Number: US 9,437,471 B2
- Document ID: US9437471B2
- Status: Granted
- Kind: B2
- Application number: 14/572,788
- Filed: 2014-12-17
- Published: 2016-06-23
- Granted: 2016-09-06
- Earliest claimed: 2014-12-17
- Assignees: United Microelectronics Corp.
- Applicants: United Microelectronics Corp.
- Inventors: Liang-An Huang
- Web page: https://patentgrep.com/patent/US9437471B2

## CPC

- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10D 62/116: {adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions}
- H10W 10/0143: {comprising concurrently refilling multiple trenches having different shapes or dimensions}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A method of manufacturing shallow trench isolations is provided in the present invention, which includes the steps of providing a substrate, performing a zero etch to form preliminary trenches in the substrate, performing a STI etch to the preliminary trenches to form final trenches, where the final trenches are deeper and steeper than the preliminary trenches, and filling up the final trenches with insulating material to form shallow trench isolations.

## Claims

### Claim 1

A shallow trench isolation in a substrate, comprising:
a substrate;
a shallow trench isolation formed in said substrate, wherein the sidewall of said shallow trench isolation has two different slopes; and
spacer portions formed in said substrate on the upper portion of said sidewall and lower than the top surface of said shallow trench isolation.

### Claim 2 (depends on 1)

The shallow trench isolation in a substrate of claim 1, wherein the sidewall of said shallow trench isolation comprises an upper portion, a middle steep portion and a lower portion, and the slope of said middle steep portion is larger than the slope of said lower portion.

### Claim 3 (depends on 1)

The shallow trench isolation in a substrate of claim 1, wherein said shallow trench isolation is formed in the high-voltage region of said substrate.

### Claim 4 (depends on 3)

The shallow trench isolation in a substrate of claim 3, wherein said high-voltage region is high-voltage double diffused metal-oxide semiconductor (HV-DMOS) region.

### Claim 5 (depends on 3)

The shallow trench isolation in a substrate of claim 3, further comprising normal STIs formed in the region other than said high-voltage region in said substrate.

### Claim 6 (depends on 5)

The shallow trench isolation in a substrate of claim 5, wherein said shallow trench isolation in said high-voltage region is deeper and has a more gradual sidewall than said normal STIs in other regions.