# US 9,437,461 B2 · Semiconductor device and method for manufacturing the same

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- Number: US 9,437,461 B2
- Document ID: US9437461B2
- Status: Granted
- Kind: B2
- Application number: 14/730,651
- Filed: 2015-06-04
- Published: 2016-02-04
- Granted: 2016-09-06
- Earliest claimed: 2014-07-31
- Assignees: Fuji Electric Co., Ltd.
- Applicants: Fuji Electric Co., Ltd.
- Inventors: Makoto Higashidate
- Web page: https://patentgrep.com/patent/US9437461B2

## CPC

- H10W 70/02: of conductive package substrates serving as an interconnection, e.g. of metal plates (manufacture or treatment of leadframes H10W70/04)
- H10W 40/10: Arrangements for heating
- H10W 40/255: {having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates}
- H10W 40/258: {Metallic materials (H10W40/254, H10W40/257, H10W40/255, H10W40/251, H10W40/253 take precedence)}
- H10W 72/352: {comprising metals or metalloids, e.g. solders}
- H10W 90/00: Package configurations
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Aspects of the invention include a semiconductor device that enables both solder-outflow prevention and inhibition of seizures coming from laser processing residues. A semiconductor device can include a semiconductor chip, a plurality of insulating substrates on each of which the semiconductor chip is fixed, a heat sink having a plurality of first grooves surrounding each one of more than one predetermined arrangement area. The plurality of insulating substrates can be arranged at each of the predetermined areas, and a plurality of second grooves surrounding the first groove, wherein the second grooves are shallower in depth than each of the first grooves, and solder filled between the insulating substrate and the arrangement area on the heat sink.

## Claims

### Claim 1

A semiconductor device, comprising:
a plurality of semiconductor chips;
a plurality of insulating substrates on each of which the respective semiconductor chip is fixed;
a heat sink having a plurality of first grooves entirely surrounding each one of more than one predetermined arrangement area, wherein each of the plurality of insulating substrates is arranged at each of the predetermined arrangement areas respectively, and a plurality of second grooves entirely surrounding the first grooves, wherein each of the second grooves are shallower in depth than each of the first grooves; and
solder filled between the respective insulating substrate and the respective predetermined arrangement area on the heat sink and at least partially into the grooves to prevent further outflow and spreading beyond the second grooves.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1,
wherein the depth of at least one of the first grooves is equal to or less than 50 μm, and an interval between the at least one first groove and at least one of the second grooves, is equal to or less than 40 μm, and
wherein a sectional-area of the at least one first groove, determined as the product of the depth and the width of the at least one first groove is equal to or more than 7200 μm2 and equal to or less than 20000 μm2.

### Claim 3 (depends on 2)

The semiconductor device according to claim 2,
wherein the plurality of first grooves are laid out in a stripe pattern, and the sum of sectional-areas of the plurality of first grooves is equal to or more than 7200 μm2 and equal to or less than 20000 μm2.

### Claim 4 (depends on 2)

The semiconductor device according to claim 2,
wherein the plurality of first grooves are laid out in a stripe pattern, and an interval between the first grooves neighboring is equal to or more than 5 μm and equal to or less than 20 μm.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1,
wherein the heat sink comprises a first metal, a surface of which is coated with a second metal layer.

### Claim 6 (depends on 5)

The semiconductor device according to claim 5,
wherein a depth of at least one of the second grooves is equal to or more than a thickness of the second metal layer, and equal to or less than three-quarters of the depth of the first groove.

### Claim 7 (depends on 5)

The semiconductor device according to claim 5,
wherein the first metal is aluminum or copper, and the second metal layer a nickel layer or a titanium layer.

### Claim 8 (depends on 5)

The semiconductor device according to claim 5,
wherein the first metal is copper, and a dielectric film is disposed on a bottom face of the first groove.