# US 9,437,460 B2 · Method for manufacturing semiconductor device

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- Number: US 9,437,460 B2
- Document ID: US9437460B2
- Status: Granted
- Kind: B2
- Application number: 14/665,577
- Filed: 2015-03-23
- Published: 2015-12-31
- Granted: 2016-09-06
- Earliest claimed: 2014-06-27
- Assignees: Mitsubishi Electric Corporation
- Applicants: Mitsubishi Electric Corporation
- Inventors: Naoki Yoshimatsu; Kiyohiro Uchida; Taketoshi Shikano; Masayoshi Shinkai
- Web page: https://patentgrep.com/patent/US9437460B2

## CPC

- H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers}
- H10W 70/658: {for devices provided for in groups H10D8/00 - H10D48/00}
- H10W 74/01: Manufacture or treatment
- H10W 74/114: {by a substrate and the encapsulations}
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 95/00: Packaging processes not covered by the other groups of this subclass
- H10W 40/255: {having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates}
- H10W 70/479: {on or in insulating or insulated package substrates, interposers, or redistribution layers}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07336: {Soldering or alloying}
- H10W 72/075: {of bond wires}
- H10W 72/352: {comprising metals or metalloids, e.g. solders}
- H10W 72/5363: {the connected ends being wedge-shaped}
- H10W 72/5445: {being orthogonal to a side surface of the chip, e.g. parallel arrangements}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Entry of resin into a cylindrical electrode can be suppressed without excessively increasing the number of parts and without unnecessarily damaging members. For this purpose, a semiconductor chip and a cylindrical electrode are mounted on one main surface of substrate. The substrate, the semiconductor chip, and the cylindrical electrode are sealed with resin material such that the cylindrical electrode has one end mounted to the substrate and the other opposite end at least exposed. After the step of sealing, an opening extending from the other end of the cylindrical electrode to a cavity in the cylindrical electrode is formed. Before performing the step of forming an opening, the other end of the cylindrical electrode is closed.

## Claims

### Claim 1

A method for manufacturing a semiconductor device, comprising the steps of:
mounting a semiconductor chip and a cylindrical electrode on one main surface of a substrate, said cylindrical electrode including a side wall portion, a lower end, and an upper end, said upper end including an annular portion axially corresponding to said side wall portion and a transverse portion extending radially across said annular portion above a cavity formed in said cylindrical electrode, said transverse portion having a first axial thickness in a cavity cutout region directly above said cavity and a second axial thickness in another region directly above said cavity, wherein said first axial thickness is thinner than said second axial thickness;
sealing said substrate, said semiconductor chip, and said cylindrical electrode with resin material such that said lower end of said cylindrical electrode is mounted to said substrate and said upper end of said cylindrical electrode is exposed; and
forming an opening extending through said transverse portion of said upper end of said cylindrical electrode to said cavity in said cylindrical electrode after said step of sealing,
before performing said step of forming an opening, said upper end of said cylindrical electrode is closed by said transverse portion of said upper end.

### Claim 2 (depends on 1)

The method for manufacturing a semiconductor device according to claim 1, wherein
said cylindrical electrode is formed so as to include a flange on a side of said lower end, and
said cylindrical electrode is mounted to said substrate at said flange.

### Claim 3 (depends on 1)

The method for manufacturing a semiconductor device according to claim 1, wherein
an outer periphery of said cylindrical electrode is inclined so that a size of an outer periphery of said cylindrical electrode in a planar view is gradually reduced from a side of said lower end to a side of said upper end.

### Claim 4 (depends on 1)

The method for manufacturing a semiconductor device according to claim 1, wherein
before performing said step of forming an opening, said cavity cutout region is directly above an outer periphery of said cavity.

### Claim 5 (depends on 1)

The method for manufacturing a semiconductor device according to claim 1, wherein
said step of mounting a cylindrical electrode includes the steps of:
retaining a plurality of said cylindrical electrodes by means of a single jig; and
supplying said plurality of cylindrical electrodes collectively onto one main surface of said substrate by means of said jig.