# US 9,437,437 B2 · Method for producing semiconductor device by plating processing

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- Number: US 9,437,437 B2
- Document ID: US9437437B2
- Status: Granted
- Kind: B2
- Application number: 14/177,770
- Filed: 2014-02-11
- Published: 2015-03-05
- Granted: 2016-09-06
- Earliest claimed: 2013-08-30
- Assignees: Kabushiki Kaisha Toshiba
- Applicants: Kabushiki Kaisha Toshiba
- Inventors: Satoshi Wakatsuki; Atsuko Sakata
- Web page: https://patentgrep.com/patent/US9437437B2

## CPC

- H10P 14/40: of conductive or resistive materials
- H10B 63/20: {comprising selection components having two electrodes, e.g. diodes}
- H10B 63/82: {the switching components having a common active material layer}
- H10N 70/011: {Manufacture or treatment of multistable switching devices}
- H10N 70/231: {based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/882: {Compounds of sulfur, selenium or tellurium, e.g. chalcogenides}
- H10P 14/46: using a liquid
- H10W 20/063: {by forming conductive members before forming protective insulating material}
- H10W 20/0636: {the conductive members being on sidewalls}
- H10W 20/064: {by modifying the conductivity of conductive parts, e.g. by alloying}
- H10W 20/066: {by forming silicides of refractory metals}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10B: ELECTRONIC MEMORY DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

According to one embodiment, a method for producing a semiconductor device includes forming a base film above a semiconductor substrate, forming a core above the base film, forming a side wall film on a side face of the core, and replacing at least part of the side wall film with a metal film by performing plating processing.

## Claims

### Claim 1

A method for producing a semiconductor device, comprising:
forming a base film above a semiconductor substrate;
forming a core above the base film;
forming a side wall film on a side face of the core;
replacing at least part of the side wall film with a metal film by performing plating processing; and
removing the core after the plating processing.

### Claim 2 (depends on 1)

The method for producing a semiconductor device according to claim 1, wherein the side wall film includes a silicon film.

### Claim 3 (depends on 2)

The method for producing a semiconductor device according to claim 2, wherein a portion of the silicon film remains after the plating processing.

### Claim 4 (depends on 3)

The method for producing a semiconductor device according to claim 3, further comprising:
converting the silicon film remaining after the plating processing into a metal silicide film by annealing the metal film.

### Claim 5 (depends on 1)

The method for producing a semiconductor device according to claim 1, wherein the plating processing includes immersing the semiconductor substrate in a displacement plating solution, and then immersing the semiconductor substrate in an electroless plating solution.

### Claim 6 (depends on 5)

The method for producing a semiconductor device according to claim 5, wherein the displacement plating solution includes a first metal and the electroless plating solution includes a second metal, the first metal acting as a catalyst for an electroless plating reaction of the second metal.

### Claim 7 (depends on 6)

The method for producing a semiconductor device according to claim 6, wherein the electroless plating solution includes a solvent, a metal ion of the second metal, a reducing agent, and a complexing agent.

### Claim 8

A method for producing a semiconductor device, comprising:
forming a base film above a semiconductor substrate;
forming a pattern above the base film, the pattern comprising a plurality of core structures having a pitch with a length “a”;
forming a silicon film on a side wall of each of the core structures; and
plating each of the core structures to replace at least a portion of the silicon film with a metal film to form a wiring pattern.

### Claim 9 (depends on 8)

The method for producing a semiconductor device according to claim 8, wherein the wiring pattern includes a line width of approximately a/4.

### Claim 10 (depends on 8)

The method for producing a semiconductor device according to claim 8, further comprising:
removing a native oxide from the silicon film prior to the plating.

### Claim 11 (depends on 8)

The method for producing a semiconductor device according to claim 8, wherein a portion of the silicon film remains after the plating; and the method further comprises converting the silicon film remaining after the plating into a metal silicide film by annealing the metal film.

### Claim 12

A method for producing a semiconductor device, comprising:
forming a base film above a semiconductor substrate;
forming a pattern above the base film including a plurality of core structures having a pitch “a”;
forming a silicon film on a side wall of each of the core structures; and
forming a wiring pattern having a pitch of a/2 by replacing at least a portion of the silicon film on the side wall of each of the core structures with a metal film.