# US 9,437,314 B2 · Precharge control signal generator and semiconductor memory device therewith > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,437,314 B2 - Document ID: US9437314B2 - Status: Granted - Kind: B2 - Application number: 14/737,938 - Filed: 2015-06-12 - Published: 2016-03-03 - Granted: 2016-09-06 - Earliest claimed: 2014-08-27 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Hyun-Jin Shin - Web page: https://patentgrep.com/patent/US9437314B2 ## CPC - G11C 16/24: Bit-line control circuits - G11C 7/04: with means for avoiding disturbances due to temperature effects - G11C 7/12: Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines - G11C 16/26: Sensing or reading circuits; Data output circuits - G11C 16/28: using differential sensing or reference cells, e.g. dummy cells - G11C 7/06: Sense amplifiers; Associated circuits {, e.g. timing or triggering circuits} - G11C 7/08: Control thereof - G11C 16/32: Timing circuits - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract A precharge control signal generator and a semiconductor memory device include a precharge control signal generating circuit which generates a precharge control signal and applies the precharge control signal to a sensing circuit, and a sensing circuit configured to precharge a bit line connected to a memory cell according to the precharge control signal and read data stored in the memory cell. The precharge control signal controls the sensing circuit so that a precharge time is adjusted according to operating temperature. ## Claims ### Claim 1 A semiconductor memory device, comprising: a precharge control signal generating circuit configured to generate a precharge control signal and to apply the precharge control signal to a sensing circuit; and the sensing circuit configured to precharge a bit line connected to a memory cell according to the precharge control signal and read data stored in the memory cell, wherein the precharge control signal controls the sensing circuit so that a precharge time is adjusted according to operating temperature, and wherein the precharge control signal generating circuit comprises a proportional to absolute temperature (PTAT) current generating circuit configured to generate a PTAT current used to generate the precharge control signal. ### Claim 2 (depends on 1) The device of claim 1, wherein the precharge control signal controls the sensing circuit so that the precharge time is increased as the operating temperature is increased. ### Claim 3 (depends on 1) The device of claim 1, wherein the precharge control signal generating circuit further comprises: a reference voltage providing circuit configured to apply a reference voltage generated in response to the PTAT current to a precharge control signal output circuit; and the precharge control signal output circuit configured to output the precharge control signal in response to the reference voltage. ### Claim 4 (depends on 3) The device of claim 3, wherein the reference voltage providing circuit comprises: a first node to which the PTAT current is applied; a MOS transistor connected between the first node and a power voltage, wherein a gate terminal of the MOS transistor is connected to the first node; and a resistor connected between the first node and a ground voltage, wherein the reference voltage is a voltage level that varies between a maximum voltage level of the first node and the ground voltage. ### Claim 5 (depends on 3) The device of claim 3, wherein the precharge control signal output circuit comprises: an amplification unit configured to receive the reference voltage and a comparison voltage and output the precharge control signal based on a difference between the reference voltage and the comparison voltage; and a comparison voltage adjusting unit configured to adjust the comparison voltage according to the reference voltage. ### Claim 6 (depends on 5) The device of claim 5, wherein the comparison voltage adjusting unit comprises: a first device connected between a power voltage and a second node and configured to adjust current which flows into the second node according to the reference voltage; and a capacitor connected between the second node and a ground voltage, wherein the comparison voltage is a voltage level that varies between a maximum voltage level of the second node and the ground voltage. ### Claim 7 (depends on 6) The device of claim 6, wherein the first device comprises a PMOS transistor of which a gate terminal receives the reference voltage. ### Claim 8 A semiconductor memory device, comprising: a precharge control signal generating circuit configured to generate a precharge control signal and to apply the precharge control signal to a sensing circuit; and the sensing circuit configured to precharge a bit line connected to a memory cell according to the precharge control signal and read data stored in the memory cell, wherein the precharge control signal controls the sensing circuit so that a precharge time is adjusted according to operating temperature, and wherein the precharge control signal generating circuit comprises: a PTAT voltage generating circuit configured to generate a PTAT voltage used to generate the precharge control signal. ### Claim 9 (depends on 8) The device of claim 8, wherein the precharge control signal generating circuit further comprises: a precharge control signal output circuit configured to output the precharge control signal based on the PTAT voltage. ### Claim 10 (depends on 9) The device of claim 9, wherein the precharge control signal output circuit comprises: an amplification unit configured to receive the PTAT voltage and a comparison voltage and output the precharge control signal based on a difference between the PTAT voltage and the comparison voltage; and a comparison voltage adjusting unit configured to adjust the comparison voltage according to the PTAT voltage. ### Claim 11 (depends on 10) The device of claim 10, wherein the comparison voltage adjusting unit comprises: a first device connected between a power voltage and a second node and configured to adjust current which flows into the second node according to the PTAT voltage; and a capacitor connected between the second node and a ground voltage, wherein the comparison voltage is a voltage level that varies between a maximum voltage level of the second node and the ground voltage. ### Claim 12 A precharge control signal generating circuit which generates a precharge control signal for controlling a precharge time with respect to precharge operation performed in advance of a read operation of data stored in a memory cell, wherein the precharge control signal adjusts the precharge time according to operating temperature, and wherein the precharge control signal generating circuit comprises a PTAT current generating circuit configured to generate a PTAT current used to generate the precharge control signal. ### Claim 13 (depends on 12) The circuit of claim 12, wherein the precharge control signal generating circuit comprises: a reference voltage providing circuit configured to apply a reference voltage generated in response to the PTAT current to a precharge control signal output circuit; and the precharge control signal output circuit configured to output the precharge control signal in response to the reference voltage. ### Claim 14 (depends on 13) The circuit of claim 13, wherein the reference voltage providing circuit comprises: a first node to which the PTAT current is applied; a MOS transistor connected between the first node and a power voltage, wherein a gate terminal of the MOS transistor is connected to the first node; and a resistor connected between the first node and a ground voltage, wherein the reference voltage is a voltage between the first node and the ground voltage. ### Claim 15 (depends on 13) The circuit of claim 13, wherein the precharge control signal output circuit comprises: an amplification unit configured to receive the reference voltage and a comparison voltage and output the precharge control signal based on a difference between the reference voltage and the comparison voltage; and a comparison voltage adjusting unit configured to adjust the comparison voltage according to the reference voltage. ### Claim 16 (depends on 15) The circuit of claim 15, wherein the comparison voltage adjusting unit comprises: a first device connected between a power voltage and a second node and configured to adjust current which flows into the second node according to the reference voltage; and a capacitor connected between the second node and a ground voltage, wherein the comparison voltage is a voltage level that varies between a maximum voltage of the second node and the ground voltage.