# US 9,437,294 B2 · Resistance variable memory sensing > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,437,294 B2 - Document ID: US9437294B2 - Status: Granted - Kind: B2 - Application number: 14/717,784 - Filed: 2015-05-20 - Published: 2015-09-10 - Granted: 2016-09-06 - Earliest claimed: 2013-04-24 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Ferdinando Bedeschi; Roberto Gastaldi - Web page: https://patentgrep.com/patent/US9437294B2 ## CPC - G11C 13/004: {Reading or sensing circuits or methods} - G11C 11/1673: {Reading or sensing circuits or methods} - G11C 11/1675: {Writing or programming circuits or methods} - G11C 13/0002: {using resistive RAM [RRAM] elements} - G11C 13/0033: {Disturbance prevention or evaluation; Refreshing of disturbed memory data} - G11C 13/0069: {Writing or programming circuits or methods} - G11C 2013/0047: {Read destroying or disturbing the data} - G11C 2013/0057: {Read done in two steps, e.g. wherein the cell is read twice and one of the two read values serving as a reference value} - G11C 2013/0076: {Write operation performed depending on read result} - G11C 2013/0092: {Write characterized by the shape, e.g. form, length, amplitude of the write pulse} - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract The present disclosure includes apparatuses and methods for sensing a resistance variable memory cell. A number of embodiments include programming a memory cell to an initial data state and determining a data state of the memory cell by applying a programming signal to the memory cell, the programming signal associated with programming memory cells to a particular data state, and determining whether the data state of the memory cell changes from the initial data state to the particular data state during application of the programming signal. ## Claims ### Claim 1 A method for sensing a resistance variable memory cell, comprising: applying a programming ramp signal to the memory cell, wherein the programming signal is a signal that is used to program the memory cell to a particular resistance state and is of a sufficient magnitude to program the memory cell to the particular resistance state, sensing a signal associated with the memory cell while the programming signal is being applied to the memory during a first time period; sensing a signal associated with the memory cell while the programming signal is being applied to the memory during a second time period; and determining a resistance state of the memory cell based on the signals sensed during the first time period and during the second time period by comparing the signals sensed during the first time period and during the second time period. ### Claim 2 (depends on 1) The method of claim 1, wherein determining whether the resistance state of the memory cell changes from the initial resistance state to the particular resistance state includes determining whether the resistance state of the memory cell changed from an anti-parallel state to a parallel state. ### Claim 3 (depends on 1) The method of claim 1, wherein determining the resistance state of the memory cell includes determining that the resistance state of the memory cell is the particular resistance state if application of the programming signal does not change the resistance state of the memory cell from the initial resistance state to the particular resistance state. ### Claim 4 (depends on 1) The method of claim 1, wherein the method includes programming the memory cell from the particular resistance state back to the initial resistance state if it is determined that application of the programming signal changed the resistance state of the memory cell from the initial resistance state to the particular resistance state. ### Claim 5 (depends on 1) The method of claim 1, wherein the method includes determining the resistance state of the memory cell via a controller coupled to the memory cell. ### Claim 6 (depends on 1) The method of claim 1, wherein determining the resistance state of the memory cell based on the signals sensed during the first time period and during the second time period includes determining a change in the slope of an electrical characteristic between the signal sensed during the first time period and the signal sensed during the second time period. ### Claim 7 An apparatus, comprising: a controller coupled to a resistance variable memory cell and configured to: determine a resistance state of the memory cell by: applying a programming ramp signal to the memory cell, wherein the programming signal is a signal that is used to program the memory cell to a particular resistance state and is of a sufficient magnitude to program the memory cell to the particular resistance state; and determining whether the resistance state of the memory cell changes from an initial resistance state to the particular resistance state during application of the programming signal, by comparing a first sensed signal associated with the memory cell responsive to the applied programming signal to a second sensed signal associated with the memory cell responsive to the applied programming signal. ### Claim 8 (depends on 7) The apparatus of claim 7, wherein determining whether the resistance state of the memory cell changes from the initial resistance state to the particular resistance state includes determining whether the resistance state of the memory cell changed from an anti-parallel state to a parallel state. ### Claim 9 (depends on 7) The apparatus of claim 7, wherein determining the resistance state of the memory cell includes determining that the resistance state of the memory cell is the particular resistance state when a difference between the first sensed signal and the second sensed signal is less than a threshold amount. ### Claim 10 (depends on 7) The apparatus of claim 7, wherein determining whether the resistance state of the memory cell changes from the initial resistance state to the particular resistance state includes using a change determination component to determine a change in signal associated with the memory cell. ### Claim 11 (depends on 7) The apparatus of claim 7, wherein determining the resistance state of the memory cell includes determining that the resistance state of the memory cell is the particular resistance state when a determined change between the first sensed signal and the second sensed signal is less than a threshold amount. ### Claim 12 (depends on 7) The apparatus of claim 7, wherein determining the resistance state of the memory cell includes determining that the resistance state of the memory cell is a resistance state different from the particular resistance state when a determined change between the first sensed signal and the second sensed signal is greater than or equal to a threshold amount. ### Claim 13 An apparatus, comprising: a controller coupled to a resistance variable memory cell and configured to control: determining a resistance state of the memory cell by: applying a programming ramp signal to the memory cell, wherein the programming signal is a signal that is used to program the memory cell to a particular resistance state and is of a sufficient magnitude to program the memory cell to the particular resistance state; comparing a signal associated with the memory cell during a first time period to a signal associated with the memory cell during a second time period while the programming signal is applied to the memory cell; and determining whether the resistance state of the memory cell changes from an initial resistance state to a particular resistance state during application of the programming signal. ### Claim 14 (depends on 13) The apparatus of claim 13, wherein the controller is configured to control sensing the signal associated with the memory cell during the first time period and sensing the signal associated with the memory cell during the second time period. ### Claim 15 (depends on 13) The apparatus of claim 13, wherein the controller is configured to determine the memory cell is in the particular resistance state if the signal associated with the memory cell during the first time period is different than the signal associated with the memory cell during the second time period by less than a threshold amount. ### Claim 16 (depends on 13) The apparatus of claim 13, wherein the controller is configured to determine the memory cell is in a resistance state different from the particular resistance state if the signal associated with the memory cell during the first time period is different than the signal associated with the memory cell during the second time period by greater than or equal to a threshold amount. ### Claim 17 (depends on 13) The apparatus of claim 13, wherein the controller is configured to control applying a programming signal associated with programming memory cells to a resistance state different from the particular resistance state when the signal associated with the memory cell during the first time period is different than the signal associated with the memory cell during the second time period by greater than or equal to a threshold amount. ### Claim 18 (depends on 13) The apparatus of claim 13, wherein comparing the signal associated with the memory cell during the first time period to the signal associated with the memory cell during the second time period includes using a change determination component. ### Claim 19 (depends on 13) The apparatus of claim 13, wherein the change determination component includes a first capacitor, a second capacitor, and a comparator.