# US 9,437,148 B2 · Display device having integral capacitors and reduced size > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,437,148 B2 - Document ID: US9437148B2 - Status: Granted - Kind: B2 - Application number: 14/262,414 - Filed: 2014-04-25 - Published: 2015-07-09 - Granted: 2016-09-06 - Earliest claimed: 2014-01-07 - Assignees: Samsung Display Co., Ltd. - Applicants: Samsung Display Co., Ltd. - Inventors: Bon-Yong Koo; Dong Yeon Son - Web page: https://patentgrep.com/patent/US9437148B2 ## CPC - G09G 3/3648: {using an active matrix (G09G3/367 - G09G3/3696 take precedence)} - G09G 3/3677: {suitable for active matrices only} - G09G 2300/0408: Integration of the drivers onto the display substrate - G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract The output stage of a monolithically integrated gate lines driver circuit of a display device has a capacitor boosted, source-follower configuration in which a relatively large area transistor (Tr1) receives drive power at its drain from a clock signal providing rail (CK), a source of the transistor drives a respective gate line and a relatively large area boost capacitor (C1) connects to gate and the source of the transistor. In order to reduce consumption of substrate area, the relatively large area boost capacitor is laid out to overlap the transistor while a relatively thick first insulating layer of relatively low dielectric constant positioned between the transistor and the overlying boost capacitor. ## Claims ### Claim 1 A display device, comprising: a display panel including a display area in which a plurality of pixel units are positioned on a light-passing substrate and in which a non-display peripheral area is also disposed on the substrate and adjacent to the display area; and a gate lines driver positioned on the substrate and in the peripheral area and including a transistor and a capacitor, wherein the capacitor is formed to overlap the transistor with a first insulating layer interposed between the transistor and the capacitor, each pixel unit respectively includes a respective switching element, a respective pixel electrode connected with the switching element, and a respective portion of a common electrode coupled to provide a common voltage, the pixel electrode and the common electrode portion are positioned above the first insulating layer, wherein the capacitor includes a first electrode and a second electrode which overlap each other with a second insulating layer interposed therebetween, the first electrode of the capacitor is positioned at a same layer as that of one of the pixel electrode and the common electrode portion, and the second electrode of the capacitor is positioned at a same layer as that of another of the pixel electrode and the common electrode portion. ### Claim 2 (depends on 1) The display device of claim 1, wherein: the first insulating layer includes an organic insulating material. ### Claim 3 (depends on 2) The display device of claim 2, wherein: the pixel electrode and the common electrode portion are stack, one overlapping the other and having the second insulating layer interposed therebetween. ### Claim 4 (depends on 3) The display device of claim 3, wherein: the transistor includes a first gate electrode, a first drain electrode, and a first source electrode, the first electrode of the capacitor is connected with the first gate electrode, and the second electrode of the capacitor is connected with the first source electrode. ### Claim 5 (depends on 4) The display device of claim 4, wherein: the first insulating layer includes a first contact hole exposing the first gate electrode and a second contact hole exposing the first source electrode, the first electrode of the capacitor is connected with the first gate electrode through the first contact hole, and the second electrode of the capacitor is connected with the first source electrode through the second contact hole. ### Claim 6 (depends on 5) The display device of claim 5, further comprising: a gate line transferring a gate signal to the pixel, wherein the first insulating layer further includes a third contact hole exposing an end portion of the gate line, and the second electrode is connected with the end portion of the gate line through the third contact hole. ### Claim 7 (depends on 6) The display device of claim 6, wherein: a thickness of the first insulating layer is approximately 1.0 μm or more. ### Claim 8 (depends on 7) The display device of claim 7, wherein: a dielectric constant of the first insulating layer is approximately 10 or less. ### Claim 9 (depends on 1) The display device of claim 1, wherein: the pixel electrode and the common electrode overlap each other with the second insulating layer being interposed therebetween. ### Claim 10 (depends on 9) The display device of claim 9, wherein: the first electrode of the capacitor is positioned at a same layer as that of the pixel electrode, and the second electrode of the capacitor is positioned at a same layer as that of the common electrode portion. ### Claim 11 (depends on 9) The display device of claim 9, wherein: the first electrode of the capacitor is positioned at a same layer as that of the common electrode portion, and the second electrode of the capacitor is positioned at a same layer as that of the pixel electrode. ### Claim 12 (depends on 9) The display device of claim 9, wherein: one of the pixel electrode and the common electrode portion includes a plurality of branch electrodes, and the other electrode overlaps the plurality of branch electrodes. ### Claim 13 (depends on 1) The display device of claim 1, wherein: the transistor includes a first gate electrode, a first drain electrode, and a first source electrode, the first electrode of the capacitor is connected with the first gate electrode, and the second electrode of the capacitor is connected with the first source electrode. ### Claim 14 (depends on 13) The display device of claim 13, wherein: the first insulating layer includes a first contact hole exposing the first gate electrode and a second contact hole exposing the first source electrode, the first electrode is connected with the first gate electrode through the first contact hole, and the second electrode is connected with the first source electrode through the second contact hole. ### Claim 15 (depends on 14) The display device of claim 14, further comprising: a gate line transferring a gate signal to the pixel, wherein the first insulating layer further includes a third contact hole exposing an end portion of the gate line, and the second electrode is connected with the end portion of the gate line through the third contact hole. ### Claim 16 (depends on 1) The display device of claim 1, wherein: a thickness of the first insulating layer is approximately 1.0 μm or more. ### Claim 17 (depends on 16) The display device of claim 16, wherein: a dielectric constant of the first insulating layer is approximately 10 or less. ### Claim 18 (depends on 1) The display device of claim 1, further comprising: a third insulating layer positioned between the first insulating layer and the transistor.