# US 9,437,138 B2 · Display device

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- Number: US 9,437,138 B2
- Document ID: US9437138B2
- Status: Granted
- Kind: B2
- Application number: 14/793,781
- Filed: 2015-07-08
- Published: 2015-10-29
- Granted: 2016-09-06
- Earliest claimed: 2009-04-23
- Assignees: Global OLED Technology LLC
- Applicants: Global Oled Technology LLC
- Inventors: Seiichi Mizukoshi; Makoto Kohno; Kouichi Onomura
- Web page: https://patentgrep.com/patent/US9437138B2

## CPC

- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G09G 3/3275: Details of drivers for data electrodes
- G09G 5/39: Control of the bit-mapped memory
- G09G 3/2055: {the pattern being varied in time}
- G09G 3/2092: {Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto (suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165)}
- G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G 2310/027: Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
- G09G 2320/0233: Improving the luminance or brightness uniformity across the screen
- G09G 2320/0247: Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
- G09G 2320/0285: using tables for spatial correction of display data
- G09G 2320/043: Preventing or counteracting the effects of ageing
- G09G 2320/0673: for control of gamma adjustment, e.g. selecting another gamma curve
- G09G 2360/16: Calculation or use of calculated indices related to luminance levels in display data
- G09G 2360/18: Use of a frame buffer in a display terminal, inclusive of the display panel
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

The rate of reading from a memory for storing display irregularity correction data is lowered. At the time of display, calculation is carried out in a correction calculation section using an input signal and correction data in one or more memory units, and brightness inconsistency correction is carried out. The way in which correction calculation is carried out in the correction calculation section is changed for every frame.

## Claims

### Claim 1

A display device for displaying frames of video information comprising:
a display panel comprising a plurality of pixel circuits arranged in a pixel matrix, wherein the pixel matrix is divided into regions of n pixel circuits each, where n is an integer of 2 or more;
a source driver connected to the display panel to provide data signals to pixel circuits in each column of the pixel matrix, wherein the data signals represent a target brightness for each pixel circuit;
a correction calculation section connected to the source driver for correcting variations in brightness due to nonuniformity of the plurality of pixel circuits;
a first non-volatile memory unit for storing a correction value for each pixel circuit;
a second non-volatile memory unit for storing an average of correction values for the pixel circuits of each region;
a first double buffer unit connected between the correction calculation section and the first non-volatile memory unit for conveying a correction value for each pixel circuit from the first non-volatile memory unit to the correction calculation section;
a second double buffer unit connected between the correction calculation section and the second non-volatile memory unit for conveying an average of correction values for the pixel circuits of each region from the second non-volatile memory unit to the correction calculation section; and
wherein for each set of m frames, where m is an integer of 2 or more, the correction calculation section corrects a distinct set of n/m pixel circuits within each region, where n/m is an integer of 1 or more, using the correction values for the pixel circuits of the corresponding region in each frame, and corrects the remaining pixel circuits in each region using the average of correction values for pixel circuits of the corresponding region in each frame, and wherein over the set of m frames, each pixel circuit in the pixel matrix is corrected with the correction value for a corresponding pixel circuit only once.

### Claim 2 (depends on 1)

The display device of claim 1, wherein each region comprises n adjacent pixel circuits on a row of the pixel matrix.

### Claim 3 (depends on 1)

The display device of claim 1, wherein each region comprises n adjacent pixel circuits in a square or rectangular matrix.