# US 9,436,612 B2 · Sizing a write cache buffer based on emergency data save parameters

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 9,436,612 B2
- Document ID: US9436612B2
- Status: Granted
- Kind: B2
- Application number: 15/135,759
- Filed: 2016-04-22
- Published: 2016-08-04
- Granted: 2016-09-06
- Earliest claimed: 2014-05-01
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Kirk D. Lamb
- Web page: https://patentgrep.com/patent/US9436612B2

## CPC

- G06F 12/0871: Allocation or management of cache space
- G06F 3/0619: {in relation to data integrity, e.g. data losses, bit errors}
- G06F 3/0631: {by allocating resources to storage systems}
- G06F 3/0647: {Migration mechanisms}
- G06F 3/0673: {Single storage device}
- G06F 11/3055: {Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available (error or fault processing without redundancy G06F11/0703; error detection or correction by redundancy in data representation G06F11/08; error detection or correction of the data by redundancy in operations G06F11/14; error detection or correction by redundancy in hardware G06F11/16)}
- G06F 12/0638: {Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module (address formation of the next microinstruction G06F9/26; masking faults in memories by using spares or by reconfiguring G11C29/70)}
- G06F 12/0804: with main memory updating (G06F12/0806 takes precedence)
- G06F 12/0866: for peripheral storage systems, e.g. disk cache
- G06F 12/0868: Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
- G06F 2212/1032: Reliability improvement, data loss prevention, degraded operation etc
- G06F 2212/312: In storage controller
- G06F 2212/604: Details relating to cache allocation
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

Embodiments relate to saving data upon loss of power. An aspect includes sizing a write cache buffer based on parameters related to carrying out this emergency data save procedure. A computer implemented method for allocating a write cache on a storage controller includes retrieving, at run-time by a processor, one or more operating parameters of a component used in a power-loss save of the write cache. The component is selected from the group consisting of an energy storage element, a non-volatile memory, and a transfer logic. A size for the write cache on the storage controller is determined, based on the one or more operating parameters. A write cache, of the determined size, is allocated from a volatile memory coupled to the storage controller.

## Claims

### Claim 1

A storage controller device, the storage controller device comprising:
a volatile memory;
a non-volatile storage;
an application specific integrated circuit (ASIC);
transfer logic residing on the ASIC, the transfer logic configured to copy, upon a power loss, contents of a write cache in the volatile memory to the non-volatile storage;
an instruction memory; and
a processor, communicatively coupled to said instruction memory, the storage controller configured to perform a method comprising:
retrieving, at run-time, one or more operating parameters of the transfer logic, the one or more operating parameters including an instance-specific process speed of the transfer logic, wherein the instance-specific process speed is retrieved as bin data;
determining a voltage of the transfer logic based on the instance-specific process speed of the transfer logic;
calculating an energy consumption rate of the transfer logic during the copy upon power loss, wherein the calculating is based on the voltage, a current temperature of the transfer logic and the one or more operating parameters that are retrieved at run-time;
determining a size for the write cache in the volatile memory, based on the energy consumption rate and an amount of energy in an energy storage element that powers the copy upon power-loss; and
allocating the write cache, of the determined size, from the volatile memory.
