# US 9,436,480 B1 · Firmware RAM usage without overlays

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 9,436,480 B1
- Document ID: US9436480B1
- Status: Granted
- Kind: B1
- Application number: 14/135,890
- Filed: 2013-12-20
- Granted: 2016-09-06
- Earliest claimed: 2013-11-08
- Assignees: Western Digital Technologies, Inc.
- Applicants: Western Digital Technologies, Inc.
- Inventors: Tino Lin
- Web page: https://patentgrep.com/patent/US9436480B1

## CPC

- G06F 9/4406: {Loading of operating system}
- G06F 3/061: {Improving I/O performance}
- G06F 3/0655: {Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F 9/4401: Bootstrapping (security arrangements therefor G06F21/57)
- G06F 9/5016: {the resource being the memory}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Systems and methods are disclosed for managing program code in a computing device, such as an embedded system. In a data storage device, a non-volatile memory array stores program code comprising initialization code designed to be executed a single time during device booting, and main program code separate from the initialization code and designed to be executed after execution of the initialization code. A controller loads the initialization code to a first portion of a volatile memory array and executes the initialization code. The controller further loads the main program code, separately from the initialization code, to a second portion of the volatile memory array at least partially overlapping the first portion, and executes the main program code.

## Claims

### Claim 1

A computing device comprising:
a volatile random access memory (RAM);
a non-volatile boot read-only memory (ROM) comprising ROM boot loader code;
a non-volatile flash memory storing program code comprising:
initialization code designed to be executed a single time during device booting;
main program code separate from the initialization code and designed to be executed after execution of the initialization code; and
main code loader code designed to cause the main program code to be loaded from the flash memory to the RAM; and
a controller configured to:
read the ROM boot loader code from the boot ROM and execute the ROM boot loader code;
in response to said executing the ROM boot loader code, load the initialization code and the main code loader code to first and second adjacent portions of the RAM, respectively, as part of a single load operation;
execute the initialization code;
execute the main code loader code;
in response to said executing the main code loader code, load the main program code, separately from the initialization code, to a third portion of the RAM at least partially overlapping the first portion but not overlapping the second portion, thereby at least partially overwriting the initialization code; and
execute the main program code.

### Claim 2 (depends on 1)

The computing device of claim 1, wherein the flash memory comprises initialization code loader code that, when executed, directs the controller to load the initialization code to the first portion of the RAM and execute the initialization code.

### Claim 3 (depends on 1)

The computing device of claim 1, wherein a physical gap separates the second and third portions in the RAM.

### Claim 4 (depends on 1)

The computing device of claim 1, wherein the controller is further configured to load the main program code as part of a second load operation executed subsequently to the single load operation.

### Claim 5 (depends on 1)

The computing device of claim 1, wherein the second portion and third portion are disposed adjacent to one another in the RAM.

### Claim 6 (depends on 1)

The computing device of claim 1, wherein the computing device is a data storage device.

### Claim 7 (depends on 1)

The computing device of claim 1, wherein the controller is further configured to execute the main program code without using program overlays.

### Claim 8 (depends on 1)

The computing device of claim 1, wherein the main program code comprises at least one of operating system code and hardware device driver code.

### Claim 9 (depends on 1)

The computing device of claim 1, wherein the controller is further configured to execute the initialization code only once, during booting of the computing device.

### Claim 10 (depends on 1)

The computing device of claim 1, wherein execution of the initialization code by the controller does not involve saving global data for use by the main program code.

### Claim 11 (depends on 1)

The computing device of claim 1, wherein the initialization code and main program code are separately-compiled pieces of code.

### Claim 12 (depends on 1)

The computing device of claim 1, wherein the initialization code comprises X bytes of data, the main program code comprises Y bytes of data, and the RAM consists of less than Z bytes of storage space, wherein Z=X+Y.

### Claim 13 (depends on 1)

The computing device of claim 1, wherein the initialization code comprises code that, when executed, directs the controller to perform power-on self-testing and initialize one or more peripheral devices.

### Claim 14 (depends on 1)

The computing device of claim 1, wherein the controller is further configured to read and execute the ROM boot loader code in response to power-up of the computing device.

### Claim 15 (depends on 1)

The computing device of claim 1, wherein the flash memory, RAM and controller are components of an embedded system.

### Claim 16

A method of booting a computing device, the method comprising:
reading ROM boot loader code from a boot ROM;
executing the ROM boot loader code;
in response to said executing the ROM boot loader code, loading initialization code designed to be executed a single time during device booting and main code loader code designed to cause main program code to be loaded from a non-volatile flash memory to a volatile random access memory (RAM) to first and second adjacent portions of the RAM from the flash memory;
executing the initialization code;
executing the main code loader code;
in response to said executing the main code loader code, separately from the initialization code, loading main program code designed to be executed after execution of the initialization code from the flash memory to a third portion of the RAM at least partially overlapping the first portion but not overlapping the second portion, thereby at least partially overwriting the initialization code; and
executing the main program code.

### Claim 17 (depends on 16)

The method of claim 16, further comprising loading initialization code loader code and executing the initialization code loader code, wherein said loading and executing the initialization code is performed in response to execution of the initialization code loader code.

### Claim 18 (depends on 16)

The method of claim 16, wherein said loading the initialization code and loading the main code loader code are performed as part of a first load operation, and said loading the main program code is performed as part of a second load operation executed subsequently to the first load operation.

### Claim 19 (depends on 16)

The method of claim 16, wherein said executing the main program code is performed without using program overlays.