# US 9,436,251 B2 · Fast platform hibernation and resumption of computing systems > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,436,251 B2 - Document ID: US9436251B2 - Status: Granted - Kind: B2 - Application number: 13/996,480 - Filed: 2011-10-01 - Published: 2013-10-31 - Granted: 2016-09-06 - Earliest claimed: 2011-10-01 - Assignees: Intel Corporeation - Applicants: Barnes Cooper; Faraz A. Siddiqi - Inventors: Barnes Cooper; Faraz A. Siddiqi - Web page: https://patentgrep.com/patent/US9436251B2 ## CPC - G06F 1/32: Means for saving power - G06F 1/3203: Power management, i.e. event-based initiation of a power-saving mode - G06F 9/4418: {Suspend and resume; Hibernate and awake} - G06F 1/3275: {Power saving in memory, e.g. RAM, cache} - G06F 3/0608: {Saving storage space on storage systems} - G06F 12/023: {Free address space management} - G06F 13/00: Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (interface circuits for specific input/output devices G06F3/00 {; multiprogram control therefor G06F9/46}; multiprocessor systems G06F15/16 ) - G06F 21/81: by operating on the power supply, e.g. enabling or disabling power-on, sleep or resume operations - G06F 2212/2022: Flash memory - G06F 2212/205: Hybrid memory, e.g. using both volatile and non-volatile memory - G06F 2212/401: Compressed data - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract Fast platform hibernation and resumption for computing systems. An embodiment of an apparatus includes a volatile system memory, a nonvolatile memory, and a processor to operate according to an operating system, the processor to transition the apparatus to a first reduced power state upon receipt of a request, the transition to the first reduced power state including the processor to store context information for the computer in the volatile system memory. The apparatus further includes logic to transition the apparatus to a second reduced power state, the logic to copy the context data from the volatile system memory to the nonvolatile memory for the transition to the second reduced power state, where copying of the context data includes the logic to scan the volatile system memory to locate non-active memory elements in the volatile system memory, eliminate the non-active memory elements from the volatile system memory to generate compressed context data, and store the compressed context data in the nonvolatile memory. ## Claims ### Claim 1 An apparatus comprising: a volatile system memory; a nonvolatile memory; a processor to operate according to an operating system, the processor to transition the apparatus from an operational power state to a first reduced power state upon receipt of a request, the transition to the first reduced power state including the processor to store context data for the apparatus in the volatile system memory; and power management logic to transition the apparatus from the first reduced power state to a second reduced power state, the power management logic to copy the context data from the volatile system memory to the nonvolatile memory for the transition to the second reduced power state, wherein the copying of the context data includes the power management logic to: scan the volatile system memory to locate non-active memory elements in the volatile system memory, build a zero page filter of the non-active memory elements in the volatile system memory, eliminate the non-active memory elements from the volatile system memory based on the zero page filter to generate compressed context data, store the compressed context data and the zero page filter in the nonvolatile memory, and place the apparatus in the second reduced power state upon completion of storing the compressed context data and the zero page filter. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein the power management logic is further to restore the context data from the nonvolatile memory to the volatile system memory upon a wake event for the apparatus occurring while the apparatus is in the second reduced power state. ### Claim 3 (depends on 2) The apparatus of claim 2, further comprising a hardware scrubbing element, wherein the hardware scrubbing element is to store zeros in data elements of the volatile system memory prior to the power management logic restoring the context data from the nonvolatile memory to the volatile system memory. ### Claim 4 (depends on 2) The apparatus of claim 2, wherein the power management logic to restore the context data includes the power management logic to obtain the zero page filter from the nonvolatile memory and to restore the context data from the nonvolatile memory to the volatile system memory according to the zero page filter. ### Claim 5 (depends on 2) The apparatus of claim 2, wherein the power management logic is to store zeros in data elements of the volatile system memory prior to restoring the context data from the nonvolatile memory to the volatile system memory. ### Claim 6 (depends on 1) The apparatus of claim 1, wherein the first reduced power state is a sleep state and the second reduced power state is a hibernate state, the apparatus to consume less power in the second reduced power state than the first reduced power state. ### Claim 7 (depends on 6) The apparatus of claim 6, wherein the power management logic to transition the apparatus from the first reduced power state to the second reduced power state includes the power management logic to store data for a certain application in a location in the nonvolatile memory, and wherein the power management logic is further make the data for the application available prior to restoring the context data from the nonvolatile memory to the volatile system memory. ### Claim 8 (depends on 1) The apparatus of claim 1, wherein the copying of the context data from the volatile system memory to the nonvolatile memory occurs after the processor is powered down. ### Claim 9 A method comprising: transitioning a computing system from an operational state to a first reduced power state upon receipt of a request, the first reduced power state including the storage of context information for the computing system in a volatile system memory; and transitioning by a power management logic the computing system from the first reduced power state to a second reduced power state, including the power management logic copying the context data from the volatile system memory to a nonvolatile memory in the transition to the second reduced power state, wherein the copying of the context data includes the power management logic: scanning the volatile system memory to locate non-active memory elements in the volatile system memory, generating a zero page filter to indicate locations of the non-active memory elements in the volatile system memory, eliminating the non-active memory elements from the volatile system memory based on the zero page filter to generate compressed context data, storing the compressed context data and the zero page filter in the nonvolatile memory, and placing the apparatus in the second reduced power state upon completion of storing the compressed context data and the zero page filter. ### Claim 10 (depends on 9) The method of claim 9, further comprising: detecting a wake event for the computing system while the computing system is in the second reduced power state; and restoring by the power management logic the context data from the nonvolatile memory to the volatile system memory. ### Claim 11 (depends on 10) The method of claim 10, further comprising the power management logic storing zeros in data elements of the volatile system memory prior to restoring the context data from the nonvolatile memory to the volatile system memory. ### Claim 12 (depends on 10) The method of claim 10, further comprising storing zeros in data elements of the volatile system memory prior to restoring the context data from the nonvolatile memory to the volatile system memory utilizing a hardware scrubbing element to scrub the volatile system memory. ### Claim 13 (depends on 10) The method of claim 10, wherein the power management logic restoring the context data from the nonvolatile memory to the volatile system memory includes the power management logic: obtaining the zero page filter from the nonvolatile memory; and restoring the context data to the volatile system memory according to the zero page filter. ### Claim 14 (depends on 9) The method of claim 9, wherein transitioning to the second reduced power state includes storing data for a certain application in a location in the nonvolatile memory, and further comprising making the data for the application available prior to restoring the context data from the nonvolatile memory to the volatile system memory. ### Claim 15 (depends on 9) The method of claim 9, wherein the copying of the context data from the volatile system memory to the nonvolatile memory occurs after a processor of the computer system is powered down. ### Claim 16 A system comprising: a DRAM (dynamic random access memory) element; a nonvolatile memory element; a processor to operate according to an operating system, the processor to transition the system from an operational power state to a first reduced power state upon receipt of a request, the first reduced power state including the storage of context information for the system in the volatile system memory; power management logic to transition the system between the first reduced power state and a second reduced power state, the power management logic to copy the context data from the DRAM element to the nonvolatile memory element in a transition from the first reduced power state to the second reduced power state and to restore the context information from nonvolatile memory element to the DRAM element in a transition from the second reduced power state to the first reduced power state; and a hardware memory scrubber to store zeros in elements of the DRAM element prior to the restoration of the context information from nonvolatile memory element to the DRAM element; wherein the power management logic to copy the context data from the DRAM element to the nonvolatile memory element includes the power management logic to: scan the volatile system memory to locate non-active memory elements in the volatile memory and generate a zero page filter of the non-active memory elements; eliminate the non-active memory elements from the volatile system memory based on the zero page filter to generate compressed context data; store the compressed context data and the zero page filter in the nonvolatile memory; and place the system in the second reduced power state upon completion of storing the compressed context data and the zero page filter. ### Claim 17 (depends on 16) The system of claim 16, wherein the power management logic to restore the context data includes the logic to obtain the zero page filter from the nonvolatile memory and to restore the context data from the nonvolatile memory to the volatile system memory according to the zero page filter. ### Claim 18 (depends on 16) The system of claim 16, wherein the copying of the context data from the volatile system memory to the nonvolatile memory occurs after the processor is powered down. ### Claim 19 A non-transitory computer-readable medium having stored thereon data representing sequences of instructions that, when executed by a processor, cause the processor to perform operations comprising: transitioning a computing system from an operational state to a first reduced power state upon receipt of a request, the first reduced power state including the storage of context information for the computing system in a volatile system memory; and transitioning by a power management logic the computing system from the first reduced power state to a second reduced power state, including the power management logic copying the context data from the volatile system memory to a nonvolatile memory in the transition to the second reduced power state, wherein the copying of the context data includes the power management logic: scanning the volatile system memory to locate non-active memory elements in the volatile system memory, generating a zero page filter to indicate locations of the non-active memory elements in the volatile system memory, eliminating the non-active memory elements from the volatile system memory based on the zero page filter to generate compressed context data, storing the compressed context data and the zero page filter in the nonvolatile memory, and placing the apparatus in the second reduced power state upon completion of storing the compressed context data and the zero page filter. ### Claim 20 (depends on 19) The medium of claim 19, further comprising instructions that, when executed by the processor, cause the processor to perform operations comprising: detecting a wake event for the computing system while the computing system is in the second reduced power state; and restoring by the power management logic the context data from the nonvolatile memory to the volatile system memory. ### Claim 21 (depends on 20) The medium of claim 20, further comprising instructions that, when executed by the processor, cause the processor to perform operations comprising: storing zeros, by the power management logic, in data elements of the volatile system memory prior to restoring the context data from the nonvolatile memory to the volatile system memory. ### Claim 22 (depends on 20) The medium of claim 20, further comprising instructions that, when executed by the processor, cause the processor to perform operations comprising: storing zeros in data elements of the volatile system memory prior to restoring the context data from the nonvolatile memory to the volatile system memory by directing a hardware scrubbing element to scrub the volatile system memory. ### Claim 23 (depends on 20) The medium of claim 20, wherein restoring the context data includes the power management logic: obtaining the zero page filter from the nonvolatile memory; and restoring the context data to the volatile system memory according to the zero page filter. ### Claim 24 (depends on 19) The medium of claim 19, further comprising instructions that, when executed by the processor, cause the processor to perform operations comprising: storing data for a certain application in a location in the nonvolatile memory as a part of transitioning the computing system to the second reduced power state; and making the data for the application available prior to restoring the context data from the nonvolatile memory to the volatile system memory.