# US 9,436,250 B1 · Apparatus for improving power consumption of communication circuitry and associated methods

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- Number: US 9,436,250 B1
- Document ID: US9436250B1
- Status: Granted
- Kind: B1
- Application number: 13/330,635
- Filed: 2011-12-19
- Granted: 2016-09-06
- Earliest claimed: 2011-12-19
- Assignees: Altera Corporation
- Applicants: Curt Wortman; Keith Duwel; Michael Menghui Zheng
- Inventors: Curt Wortman; Keith Duwel; Michael Menghui Zheng
- Web page: https://patentgrep.com/patent/US9436250B1

## CPC

- H03L 7/0807: {concerning mainly a recovery circuit for the reference signal}
- G06F 1/32: Means for saving power
- G06F 1/3278: {Power saving in modem or I/O interface}
- G06F 1/3296: by lowering the supply or operating voltage
- G06F 11/0736: {in functional embedded systems, i.e. in a data processing system designed as a combination of hardware and software dedicated to performing a certain function (testing or monitoring of automated control systems G05B23/02)}
- G06F 11/076: {by exceeding a count or rate limit, e.g. word- or bit count limit}
- G06F 11/079: {Root cause analysis, i.e. error or fault diagnosis (in a hardware test environment G06F11/22; in a software test environment G06F11/36)}
- H03K 19/0008: {Arrangements for reducing power consumption}
- H03K 19/1737: {using multiplexers (H03K19/1738 takes precedence)}
- H03K 19/17728: Reconfigurable logic blocks, e.g. lookup tables
- H03K 19/1776: for memories
- H04B 17/309: Measuring or estimating channel quality parameters
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- H04B: TRANSMISSION
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

An integrated circuit (IC) includes communication circuitry, a body bias generator, and a controller. The communication circuitry includes a physical medium attachment (PMA) and a physical coding sublayer (PCS). The body bias generator provides body bias signals to the PMA and PCS. The controller controls the body bias generator such that the body bias signals are controlled to improve a power consumption of the communication circuitry.

## Claims

### Claim 1

An integrated circuit (IC), comprising:
communication circuitry, comprising a physical medium attachment (PMA) and a physical coding sublayer (PCS), to communicate with a communication channel;
a body bias generator to provide body bias signals to the PMA and PCS; and
a controller to control the body bias generator,
wherein the body bias signals are controlled to improve a power consumption of the communication circuitry, and wherein the body bias signals are controlled by monitoring a bit error rate (BER) of the communication channel and controlling the body bias signals based on the monitored bit error rate.

### Claim 2 (depends on 1)

The integrated circuit (IC) according to claim 1, wherein the communication circuitry further comprises data source/destination circuitry.

### Claim 3 (depends on 2)

The integrated circuit (IC) according to claim 2, wherein the body bias generator provides a body bias signal to the data source/destination circuitry.

### Claim 4 (depends on 3)

The integrated circuit (IC) according to claim 3, wherein the body bias signal provided to data source/destination circuitry to improve a power consumption of the communication circuitry.

### Claim 5 (depends on 4)

The integrated circuit (IC) according to claim 4, wherein the body bias provided to the data source/destination circuitry is applied to one or more transistors in the data source/destination circuitry.

### Claim 6 (depends on 1)

The integrated circuit (IC) according to claim 1, wherein the body bias signals provided to the PMA and PCS are applied to one or more transistors in the PMA and PCS.

### Claim 7 (depends on 1)

The integrated circuit (IC) according to claim 1, wherein the body bias signals are dynamically reconfigured.

### Claim 8 (depends on 7)

The integrated circuit (IC) according to claim 7, wherein the IC comprises programmable logic and programmable interconnect coupled to the communication circuitry.

### Claim 9 (depends on 1)

The integrated circuit (IC) according to claim 1, wherein the body bias signals are controlled in response to input provided by a user of the IC.

### Claim 10 (depends on 9)

The integrated circuit (IC) according to claim 9, wherein the IC comprises programmable logic and programmable interconnect coupled to the communication circuitry.

### Claim 11

An integrated circuit (IC), comprising:
communication circuitry, comprising a physical medium attachment (PMA) and a physical coding sublayer (PCS), to communicate with a communication channel;
a body bias generator to provide body bias signals to the PMA and PCS; and
wherein the body bias signals are dynamically reconfigured during operation of the IC to improve a power consumption of the communication circuitry, and wherein the body bias signals are controlled by monitoring a bit error rate of the communication channel and controlling the body bias signals based on the bit error rate.

### Claim 12 (depends on 11)

The integrated circuit (IC) according to claim 11, wherein the body bias signals are dynamically reconfigured by using input provided by a user of the IC.

### Claim 13 (depends on 11)

The integrated circuit (IC) according to claim 11, wherein the body bias signals are dynamically reconfigured by using predetermined body bias values.

### Claim 14 (depends on 11)

The integrated circuit (IC) according to claim 11, wherein the body bias signals are dynamically reconfigured by calculating body bias values.

### Claim 15 (depends on 11)

The integrated circuit (IC) according to claim 11, wherein the IC comprises programmable logic and programmable interconnect coupled to the communication circuitry.

### Claim 16

A method of operating an integrated circuit (IC), the method comprising:
generating body bias signals by using a body bias generator;
providing the body bias signals to a physical medium attachment (PMA) and a physical coding sublayer (PCS) in communication circuitry of the IC to communicate with a communication channel; and
controlling the body bias signals so as to improve a power consumption of the communication circuitry, wherein controlling the body bias signals further comprises monitoring a bit error rate of the communication channel and controlling the body bias signals based on the monitored bit error rate.

### Claim 17 (depends on 16)

The method according to claim 16, wherein controlling the body bias signals further comprises using input from a user of the IC to control the body bias values.

### Claim 18 (depends on 16)

The method according to claim 16, wherein controlling the body bias signals further comprises dynamically reconfiguring the body bias signals.