# US 9,436,243 B2 · Circuit board and power source management system of circuit board > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,436,243 B2 - Document ID: US9436243B2 - Status: Granted - Kind: B2 - Application number: 13/791,099 - Filed: 2013-03-08 - Published: 2014-05-15 - Granted: 2016-09-06 - Earliest claimed: 2012-11-09 - Assignees: NVIDIA Corporation - Applicants: Nvidia Corporation - Inventors: Yu Zhao; Fei Wang; Xiang Sun - Web page: https://patentgrep.com/patent/US9436243B2 ## CPC - G06F 1/26: Power supply means, e.g. regulation thereof (for memories G11C) - H02M 1/0025: {Arrangements for modifying reference values, feedback values or error values in the control loop of a converter} - H02M 3/1584: {with a plurality of power processing stages connected in parallel} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) ## Abstract A power source management system of a circuit board that comprises: a processor, comprising a core voltage input terminal; and a core voltage feedback terminal; and a voltage regulating member, comprising a setting terminal with a fixed reference voltage provided thereto; a detecting terminal connected to the core voltage feedback terminal to detect a feedback core voltage from the core voltage feedback terminal; and a core voltage output terminal connected to the core voltage input terminal to provide a core voltage thereto, wherein the core voltage is regulated by the voltage regulating member based on the feedback core voltage, such that the feedback core voltage is equal to the fixed reference voltage, wherein an offset voltage equal to a difference between a desired core voltage of the processor and the fixed reference voltage is provided between the core voltage input terminal and the core voltage feedback terminal by the processor. ## Claims ### Claim 1 A power source management system of a circuit board, comprising: a processor that includes: a voltage offset circuit having a first offset voltage output terminal and a second offset voltage output terminal, a core voltage input terminal coupled to the first offset voltage output terminal, and a core voltage feedback terminal coupled to the second offset voltage output terminal; and a voltage regulating means that is separate from the processor and includes: a controller, a setting terminal connected to the controller with a fixed reference voltage provided thereto, a detecting terminal connected to the controller and coupled to the core voltage feedback terminal to detect a feedback core voltage from the core voltage feedback terminal, and a core voltage output terminal coupled to the core voltage input terminal to provide a core voltage thereto, wherein the core voltage output terminal and the core voltage input terminal are separate terminals, wherein the core voltage is regulated by the voltage regulating means based on the feedback core voltage, such that the feedback core voltage is equal to the fixed reference voltage, wherein an offset voltage equal to a difference between a desired core voltage of the processor and the fixed reference voltage is provided between the core voltage input terminal and the core voltage feedback terminal by the processor. ### Claim 2 (depends on 1) The power source management system of claim 1, wherein the the offset voltage is further provided between the first offset voltage output terminal and the second offset voltage output terminal. ### Claim 3 (depends on 1) The power source management system of claim 1, wherein a reference voltage source is provided in the voltage regulating means, with an output terminal of the reference voltage source providing the fixed reference voltage to the setting terminal. ### Claim 4 (depends on 1) The power source management system of claim 1, wherein a plurality of PWM signals are output from the controller based on the fixed reference voltage and the feedback core voltage, the voltage regulating means further includes a multiphase power generating circuit connected to the controller, wherein the multiphase power generating circuit includes multiple BUCK circuits in parallel connection, with each BUCK circuit receiving one of the plurality of PWM signals, and the core voltage output terminal is formed by a common output terminal of the multiple BUCK circuits in parallel connection. ### Claim 5 (depends on 4) The power source management system of claim 4, wherein a capacitor is provided between the core voltage output terminal and the ground. ### Claim 6 (depends on 1) The power source management system of claim 1, wherein the processor comprises i& a graphics processing unit, a CPU or a digital signal processor. ### Claim 7 (depends on 1) The power source management system of claim 1, wherein the processor determines the load thereof, and determines the desired core voltage of the processor based on the load. ### Claim 8 (depends on 1) The power source management system of claim 1, wherein the core voltage input terminal is connected to the core voltage output terminal via a copper wire; and the core voltage feedback terminal is connected to the detecting terminal via a copper wire. ### Claim 9 (depends on 1) The power source management system of claim 1, wherein the core voltage is increased by the voltage regulating means when the feedback core voltage is lower than the fixed reference voltage, and decreased by the voltage regulating means when the feedback core voltage is higher than the fixed reference voltage. ### Claim 10 A circuit board, comprising: a power source management system that includes: a processor that includes: a voltage offset circuit having a first offset voltage output terminal and a second offset voltage output terminal, a core voltage input terminal coupled to the first offset voltage output terminal, and a core voltage feedback terminal coupled to the second offset voltage output terminal; and a voltage regulating means that is separate from the processor and includes: a controller, a setting terminal connected to the controller with a fixed reference voltage provided thereto, a detecting terminal connected to the controller and coupled to the core voltage feedback terminal to detect a feedback core voltage from the core voltage feedback terminal, and a core voltage output terminal coupled to the core voltage input terminal to provide a core voltage thereto, wherein the core voltage output terminal and the core voltage input terminal are separate terminals, wherein the core voltage is regulated by the voltage regulating means based on the feedback core voltage, such that the feedback core voltage is equal to the fixed reference voltage, wherein an offset voltage equal to a difference between a desired core voltage of the processor and the fixed reference voltage is provided between the core voltage input terminal and the core voltage feedback terminal by the processor. ### Claim 11 (depends on 10) The circuit board of claim 10, wherein the the offset voltage is further provided between the first offset voltage output terminal and the second offset voltage output terminal. ### Claim 12 (depends on 10) The circuit board of claim 10, wherein a reference voltage source is provided in the voltage regulating means, with an output terminal of the reference voltage source providing the fixed reference voltage to the setting terminal. ### Claim 13 (depends on 10) The circuit board of claim 10, wherein a plurality of PWM signals are output from the controller based on the fixed reference voltage and the feedback core voltage, the voltage regulating means further includes a multiphase power generating circuit connected to the controller, wherein the multiphase power generating circuit includes multiple BUCK circuits in parallel connection, with each BUCK circuit receiving one of the plurality of PWM signals, and the core voltage output terminal is formed by a common output terminal of the multiple BUCK circuits in parallel connection. ### Claim 14 (depends on 13) The circuit board of claim 13, wherein a capacitor is provided between the core voltage output terminal and the ground. ### Claim 15 (depends on 10) The circuit board of claim 10, wherein the processor comprises a graphics processing unit, a CPU or a digital signal processor. ### Claim 16 (depends on 10) The circuit board of claim 10, wherein the processor determines the load thereof, and determines the desired core voltage of the processor based on the load. ### Claim 17 (depends on 10) The circuit board of claim 10, wherein the core voltage input terminal is connected to the core voltage output terminal via a copper wire; and the core voltage feedback terminal is connected to the detecting terminal via a copper wire. ### Claim 18 (depends on 10) The circuit board of claim 10, wherein the core voltage is decreased by the voltage regulating means when the feedback core voltage is higher than the fixed reference voltage, and increased by the voltage regulating means when the feedback core voltage is lower than the fixed reference voltage. ### Claim 19 (depends on 10) The circuit board of claim 10, wherein the circuit board comprises a graphics card.