# US 9,435,847 B2 · Method for testing special pattern and probe card defect in wafer testing

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- Number: US 9,435,847 B2
- Document ID: US9435847B2
- Status: Granted
- Kind: B2
- Application number: 14/316,631
- Filed: 2014-06-26
- Published: 2015-12-31
- Granted: 2016-09-06
- Earliest claimed: 2014-06-26
- Assignees: Macronix International Co., Ltd.
- Applicants: MACRONIX International Co., Ltd.
- Inventors: Shih-Hsien Chang; Kai-Wen Tu; Yen Lin; Ching-Ren Cheng
- Web page: https://patentgrep.com/patent/US9435847B2

## CPC

- G01R 31/26: Testing of individual semiconductor devices (testing of photovoltaic devices H02S50/10; testing or measuring during manufacture or treatment {H10P74/00})
- G01R 1/0491: {for testing integrated circuits on wafers, e.g. wafer-level test cartridge}
- G01R 31/2831: {Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates (G01R31/318511 takes precedence; testing during manufacture H10P74/00)}
- G01R 31/2834: {Automated test systems [ATE]; using microprocessors or computers (G01R31/317 takes precedence; ATE for detection of defective computer hardware G06F11/2736)}
- G01R 31/2856: {Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]}
- G01R 31/2874: {related to temperature}
- G01R 31/2875: {related to heating}
- G01R 31/2877: {related to cooling}
- G01R 31/31924: {Voltage or current aspects, e.g. driver, receiver}
- G01R 35/00: Testing or calibrating of apparatus covered by the other groups of this subclass
- G01R 1/06: Measuring leads; Measuring probes (G01R19/145, G01R19/165 take precedence)
- G01R 1/06705: {Apparatus for holding or moving single probes (for moving multiple probe heads or ICs under test G01R31/2886)}
- G01R 31/265: Contactless testing {(of circuits, also in wafer-form G01R31/302)}
- G01R 31/318511: {Wafer Test}
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)

## Abstract

Methods for testing a special pattern and testing a probe card defect in wafer testing are provided. In the method for testing the special pattern, a wafer is divided into multiple testing partitions, in which each of the testing partitions includes multiple dies. The dies in each testing partition of the wafer are respectively tested by multiple sites of the probe card to obtain a testing map. Then, a number of the dies having defects and a number of the dies without defect within each of the testing partitions in the testing map are accumulated to construct chi-square test and calculate a maximum P-value. Finally, it is determined whether a minimum of the maximum P-values of all of the testing partitions is smaller than a certain predetermined threshold. If the minimum is smaller than the threshold, it is determined that the testing map of the wafer contains the special pattern.

## Claims

### Claim 1

A method for testing a special pattern in wafer testing, adapted for a test machine to determine whether a testing map of a wafer contains a special pattern, the method for testing the special pattern in wafer testing comprising:
dividing the wafer into a plurality of testing partitions, wherein each of the testing partitions comprises a plurality of dies;
respectively testing the dies in each testing partition of the wafer by a plurality of sites of the probe card to obtain the testing map of the wafer;
accumulating a number of the dies having defects and a number of the dies without defect within each of the testing partitions in the testing map to construct chi-square test and calculate a maximum P-value;
determining whether a minimum of the maximum P-values of all of the testing partitions is smaller than a threshold; and
determining that the testing map of the wafer contains the special pattern when the minimum is smaller than the threshold.

### Claim 2 (depends on 1)

The method for testing the special pattern in wafer testing as claimed in claim 1, wherein the step of dividing the wafer into the testing partitions comprises:
dividing the wafer into a plurality of fan-shaped partitions while taking a center of the wafer as a circle center, and dividing the fan-shaped partitions into the testing partitions by circles of different radiuses.

### Claim 3 (depends on 1)

The method for testing the special pattern in wafer testing as claimed in claim 1, wherein the step of dividing the wafer into the testing partitions comprises:
dividing the wafer into a plurality of strip-shaped partitions of a same width to serve as the testing partitions.

### Claim 4 (depends on 1)

The method for testing the special pattern in wafer testing as claimed in claim 1, wherein the step of dividing the wafer into the testing partitions comprises:
adjusting ranges of the testing partitions, such that the testing partitions have a same area.

### Claim 5 (depends on 1)

The method for testing the special pattern in wafer testing as claimed in claim 1, wherein after the step of testing the dies in each testing partition of the wafer by the sites of the probe card to obtain the testing map of the wafer, the method further comprises:
rotating ranges of the testing partitions while taking a center of the wafer as a circle center; and
accumulating a number of the dies having defects and a number of the dies without defect within each of the rotated testing partitions in the testing map to construct the chi-square test and calculate the maximum P-value, so as to determine whether the testing map of the wafer contains the special pattern according to whether the minimum of the maximum P-values is smaller than the threshold.

### Claim 6 (depends on 1)

The method for testing the special pattern in wafer testing as claimed in claim 1, wherein in the step of determining whether the minimum of the maximum P-values is smaller than the threshold, when the minimum is smaller than the threshold, the method further comprises:
determining that the testing map of the testing partition corresponding to the maximum P-value smaller than the threshold contains the special pattern.

### Claim 7

A method for testing a probe card defect in wafer testing, adapted for a test machine to determine whether a probe card of a wafer has a defect, the method for testing the probe card defect in wafer testing comprising:
dividing the wafer into a plurality of testing partitions, wherein each of the testing partitions comprises a plurality of dies;
respectively testing the dies in each testing partition of the wafer in at least one wafer by a plurality of sites of the probe card;
accumulating a number of the dies having defects and a number of the dies without defect in a result obtained by each of the sites testing the dies of the testing partitions of the wafer to construct chi-square test and calculate a maximum P-value;
determining whether a minimum of the maximum P-values of all of the sites is smaller than a threshold; and
determining that the probe card has a defect when the minimum is smaller than the threshold.

### Claim 8 (depends on 7)

The method for testing the probe card defect in wafer testing as claimed in claim 7, wherein the step of accumulating the number of the dies having defects and the number of the dies without defect in the result obtained by each of the sites testing the dies of the testing partitions of the wafer to construct the chi-square test and calculate the maximum P-value further comprises:
excluding the result of the dies located at an edge of the wafer when accumulating the number of the dies having defects and the number of the dies without defect.

### Claim 9 (depends on 7)

The method for testing the probe card defect in wafer testing as claimed in claim 7, wherein the step of accumulating the number of the dies having defects and the number of the dies without defect in the result obtained by each of the sites testing the dies of the testing partitions of the wafer to construct the chi-square test and calculate the maximum P-value further comprises:
accumulating a total number of the dies within the testing partitions of the wafer tested by each of the sites, and determining whether the total number reaches a predetermined value; and
accumulating a number of the dies having defects and a number of the dies without defect in the dies tested by each of the sites to construct the chi-square test and calculate the maximum P-value when the total number reaches the predetermined value.

### Claim 10

A method for testing wafer testing, adapted for a test machine to determine whether a testing result of at least one wafer has a defect, the method for testing wafer testing comprising:
dividing each wafer into a plurality of testing partitions, wherein each of the testing partitions comprises a plurality of dies;
respectively testing the dies in the testing partitions of each wafer in the at least one wafer by a plurality of sites of a probe card;
accumulating a number of the dies having defects and a number of the dies without defect within each of the testing partitions of each wafer to construct chi-square test and calculate a maximum P-value;
determining whether a minimum of the maximum P-values of all of the testing partitions is smaller than a threshold; and
determining that the wafer testing has a defect when the minimum is smaller than the threshold.