System on chip link layer protocol
AssigneeCavium, Inc.
InventorsSteven C. Barner, Craig A. Thomas
Life of this patent
Estimating the term…
Abstract
A network processing system provides coherent communications between multiple system-on-chips (SOCs). Data messages between SOCs are assigned to virtual channels. An interconnect linking the SOCs divides the communications into discrete data blocks, each of which contains data segments from several virtual channels. The virtual channels can be implemented to control congestion and interference among classes of communications. During transmission, the interconnect distributes the data blocks across several physical ports linking the SOCs. As a result, communications between SOCs is optimized with minimal latency.
Claims28
A method comprising:
- generating a data message at a first system-on-chip (SOC) for transmission to a second SOC, the first and second SOCs each including a cache and a plurality of processing cores;
- associating the data message with one of a plurality of virtual channels;
- generating a data block to include data associated with each of the plurality of virtual channels, the data block including at least a portion of the data message;
- distributing segments of the data block across a plurality of output ports at the first SOC;
- and
- transmitting the data block to the second SOC via the plurality of output ports.
A system comprising:
- a first system-on-chip (SOC) including a first set of input/output (I/O) ports, a first cache, and a first plurality of processors, the first SOC configured to generate a data message associated with one of a plurality of virtual channels;
- and
- a second SOC including a second set of I/O ports, a second cache, and a second plurality of processors, each of the second set of I/O ports connected to a respective port of the first set of I/O ports via a bus;
- and
- the first SOC including an interface configured to 1) generate a data block to include data associated with each of the plurality of virtual channels, the data block including at least a portion of the data message, and 2) cause the data block to be transmitted from the first SOC to the second SOC via the first and second sets of I/O ports, the interface further configured to distribute segments of the data block across the first set of I/O ports.
Dependencies are inferred from the claim text.