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US 9,432,082 B2Granted
Bus reversable orthogonal differential vector signaling codes
AssigneeKandou Labs, S.A.
InventorsRoger Ulrich, Amin Shokrollahi
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Abstract
Properties and the construction method of Orthogonal Differential Vector Signaling Codes are disclosed which are tolerant of order-reversal, as may occur when physical routing of communications channel wires causes the bus signal order to be reversed. Operation using the described codes with such bus-reversed signals can avoid complete logical or physical re-ordering of received signals or other significant duplication of receiver resources.
Claims20
A method comprising:
- receiving a set of permuted symbols on a transmission bus having a wire permutation, wherein the received set of permuted symbols correspond to an original set of symbols of a codeword permuted according to the wire permutation, the wire permutation representable by a permutation matrix P, the original set of symbols representing a set of input bits;
- forming a set of output bits from the received set of permuted symbols using a set of comparators having input weights based on respective rows of a P-amenable orthogonal matrix, wherein the P-amenable orthogonal matrix is based on an orthogonal generating matrix and the permutation matrix P, the set of output bits corresponding to the set of input bits;
- and,
- outputting the set of output bits.
1 more element
An apparatus comprising:
- a transmission bus configured to receive a set of permuted symbols, wherein the set of permuted symbols represents a wire permutation of a set of original symbols based on a permutation matrix P, the permutation matrix P associated with the transmission bus, and wherein the set of original symbols represents a set of input bits;
- and,
- a decoder configured to generate a set of output bits based on the set of permuted symbols using a set of comparators having input weights based on a P-amenable orthogonal matrix, the P-amenable orthogonal matrix based on an orthogonal generating matrix and the permutation matrix P, wherein the set of output bits corresponds to the set of input bits.
An apparatus comprising:
- an encoder configured to receive a set of input bits and responsively generate a set of symbols of a codeword based on the set of input bits and a P-amenable orthogonal matrix, the P-amenable orthogonal matrix based on orthogonal generating matrix and a permutation matrix P;
- and,
- a transmission bus configured to form a set of permuted symbols, wherein the set of permuted symbols represents a wire permutation of the set of symbols of the codeword, the wire permutation based on the permutation matrix P, the permutation matrix P associated with the transmission bus, and to transmit the set of permuted symbols.
Dependencies are inferred from the claim text.