D/A conversion circuit, oscillator, electronic apparatus, and moving object
AssigneeSeiko Epson Corporation
InventorShigenori Isozaki
Life of this patent
Estimating the term…
Abstract
A D/A conversion circuit includes a plurality of resistors connected to each other in series, a plurality of MOS transistors connected to each other so as to correspond to a plurality of contacts, and a plurality of dummy electrodes respectively disposed on sides opposite to the plurality of MOS transistors with a resistive element interposed therebetween when seen in a plan view of a semiconductor substrate. Each of the dummy electrodes is set to be in a second potential state when a gate electrode of the MOS transistor disposed on a side opposite thereto with the resistive element interposed therebetween is in a first potential state, and is set to be in a first potential state when the gate electrode of the MOS transistor is in a second potential state.
Claims18
A D/A conversion circuit comprising:
- a plurality of resistors that are constituted by a resistive element and a plurality of contacts provided in the resistive element, and are connected to each other in series;
- a plurality of MOS transistors that are connected to the plurality of contacts, respectively;
- and
- a plurality of dummy electrodes that are different from electrodes of the plurality of MOS transistors, which are respectively disposed on sides opposite to the plurality of MOS transistors with the resistive element interposed therebetween, when seen in a plan view of a semiconductor substrate,
- wherein the plurality of resistors, the plurality of MOS transistors, and the plurality of dummy electrodes are formed on the semiconductor substrate,
- wherein each of the plurality of dummy electrodes is set to be in a second potential state when a gate electrode of the MOS transistor disposed on a side opposite thereto with the resistive element interposed therebetween is in a first potential state, and is set to be in a first potential state when the gate electrode of the MOS transistor is in a second potential state, and
- wherein one of the first potential and the second potential is a potential that allows electrical conduction of the MOS transistor, and the other is a potential that does not allow electrical conduction of the MOS transistor.
Dependencies are inferred from the claim text.