Semiconductor integrated circuit, apparatus with semiconductor integrated circuit, and clock control method in semiconductor integrated circuit

A semiconductor integrated circuit comprising:

• a fixed frequency-division clock generation unit configured to generate a fixed frequency-division clock with a fixed frequency based on an output clock of a first clock source;
• a variable frequency-division clock generation unit configured to generate a variable frequency-division clock with a variable frequency by selecting either a clock based on the first clock source or a clock based on a second clock source for outputting a clock with a frequency lower than the frequency of the clock based on the first clock source;
• and
• a data path selection unit configured to select a data path as a data path for transferring data between a first functional module operating based on the fixed frequency-division clock and a second functional module operating based on the variable division clock,
• wherein, while the variable frequency-division clock is generated by the variable frequency-division clock generation unit, the data path selection unit selects a data path using a synchronization unit for converting the data into clock-synchronous data on a receiving side, and
• wherein, while the variable frequency-division clock is not generated by the variable frequency-division clock generation unit, the data path selection unit selects a data path without using the synchronization unit.

A clock control method in a semiconductor integrated circuit, the method comprising:

• generating a fixed frequency-division clock with a fixed frequency based on an output clock of a clock source;
• generating a variable frequency-division clock with a variable frequency based on the output clock of the clock source;
• and
• selecting a data path as a data path for transferring data between a first functional module operating based on the fixed frequency-division clock and a second functional module operating based on the variable frequency-division clock,
• wherein, while the variable frequency-division clock is generated by the generating a variable frequency-division clock, the selecting selects a data path using a synchronization unit for converting the data into clock-synchronous data on a receiving side, and
• wherein, while the variable frequency-division clock is not generated by the generating a variable frequency-division clock, the selecting selects a data path without using the synchronization unit.

A clock control method in a semiconductor integrated circuit, the method comprising:

• generating a fixed frequency-division clock with a fixed frequency based on an output clock of a first clock source;
• generating a variable frequency-division clock with a variable frequency by selecting either a clock based on the first clock source or a clock based on a second clock source for outputting a clock with a frequency lower than the frequency of the clock based on the first clock source;
• and
• selecting a data path as a data path for transferring data between a first functional module operating base on the fixed frequency-division clock and a second functional module operating based on the variable frequency-division clock,
• wherein, while the variable frequency-division clock is generated by the generating a variable frequency-division clock, the selecting selects a data path using a synchronization unit for converting the data into clock-synchronous data on a receiving side, and
• wherein, while the variable frequency-division clock is not generated by the generating a variable frequency-division clock, the selecting selects a data path without using the synchronization unit.