High-speed voltage level shifter circuit

A level shifter circuit, comprising:

• a latch supplied at a first voltage and having first and second branches;
• a first output connected to the first branch and outputting a first output signal variable between a first state and a second state, and a second output connected to the second branch and outputting a second output signal variable between the first state and the second state;
• a first control switch element connected in series between the first branch and the first output, and a second control switch element connected in series between the second branch and the second output;
• a first switch element connected in series between the first output and a second voltage different from the first voltage, and a second switch element connected in series between the second output and the second voltage;
• and
• a controller receiving the first and second output signals and outputting a first control signal to the first control switch element for controlling activation thereof, and a second control signal to the second control switch element for controlling activation thereof,
• wherein in an initial state of the level shifter, the first output signal is in the first state, the first control switch element is activated, the second output signal is in the second state, and the second control switch element is deactivated,
• in a final state of the level shifter, the first output signal is in the second state, the first control switch element is deactivated, the second output signal is in the first state, and the second control switch element is activated, and
• wherein the controller is configured to change the first and second control signals to deactivate the first control switch element and activate the second control switch element only after the first and second output signals reach the second and first states, respectively, and
• wherein the controller includes a NOR latch comprising a first NOR gate receiving the first output signal and the first control signal as inputs and outputting the second control signal, and a second NOR gate receiving the second output signal and the second control signal as inputs and outputting the first control signal.