Zero current detector and DC-DC converter using same
AssigneeFitipower Integrated Technology, Inc.
InventorsChio-Yi Ho, Wen-Yen Lee, Yi-Sheng Liu
Life of this patent
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Abstract
A DC-DC converter includes a zero current detector. The DC-DC converter includes a high-side switch and a low-side switch. When the DC-DC converter works in a discontinuous conduction mode (DCM). The zero current detector detects a zero current a detection node which is arranged between the high-side switch and the low-side switch generates the zero current, the zero current detector outputs the control signal to a driver. The driver switches the high-side switch and the low-side switch off simultaneously according to the control signal.
Claims14
A zero current detector comprising:
- a bias current source;
- a current mirror comprising:
- an input terminal coupled to the bias current source, a first output terminal, and a second output terminal;
- a first transistor coupled to the first output terminal and grounded via a first resistor;
- a second transistor coupled to the second output terminal and a detection node via a second resistor;
- a first comparator comprising a non-inverting input terminal coupled to the second output terminal and an inverting input terminal coupled to the first output terminal;
- a voltage controlling unit configured to control a voltage of the non-inverting input terminal, so that the voltage is in a predetermined range;
- and
- when the voltage of the non-inverting input terminal is larger than a voltage of the inverting input terminal, the first comparator outputs an indication signal to denote that the detection node generates a zero current;
- wherein the voltage controlling unit comprises a first NMOS transistor and a second comparator;
- a drain of the first NMOS transistor is coupled to the second output terminal, a source of the first NMOS transistor is grounded;
- the second comparator comprises a non-inverting input terminal, an inverting input terminal, and a second comparison output terminal, the non-inverting input terminal of the second comparator is coupled to the output terminal, the inverting input terminal of the second comparator is coupled to a reference voltage, and the second comparison output terminal is coupled to a gate of the NMOS transistor.
A DC-DC converter comprising:
- a high-side switch coupled to a power source;
- a low-side switch coupled between the high-side switch and ground, a detection node arranged between the high-side switch and the low-side switch;
- a driver switching the high-side switch and the low-side switch on and off;
- an inductor coupled between the detection node and a power output terminal;
- a zero current detector coupled between the driver and the detection node to detect a reverse current of the inductor, comprising:
- a bias current source;
- a current mirror comprising:
- an input terminal coupled to the bias current source, a first output terminal, and a second output terminal;
- a first transistor coupled to the first output terminal and grounded via a first resistor;
- a second transistor coupled to the second output terminal and a detection node via a second resistor;
- a first comparator comprising a non-inverting input terminal coupled to the second output terminal and an inverting input terminal coupled to the first output terminal;
- a voltage controlling unit configured to control a voltage of the non-inverting input terminal, so that the voltage is in a predetermined range;
- and
- when the voltage of the non-inverting input terminal is larger than a voltage of the inverting input terminal, the first comparator outputs an indication signal to denote that the detection node generates a zero current and the driver switches the low-side switch off;
- wherein the voltage controlling unit comprises a first NMOS transistor and a second comparator;
- a drain of the first NMOS transistor is coupled to the second output terminal, a source of the first NMOS transistor is grounded;
- the second comparator comprises a non-inverting input terminal, an inverting input terminal, and a second comparison output terminal, the non-inverting input terminal of the second comparator is coupled to the output terminal, the inverting input terminal of the second comparator is coupled to a reference voltage, and the second comparison output terminal is coupled to a gate of the NMOS transistor.
Dependencies are inferred from the claim text.