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US 9,431,819 B2Granted
Methods and systems of impedance source semiconductor device protection
AssigneeDRS Power & Control Technologies, Inc.
InventorsChristopher Harper, Jeffery Fischer, Ian Wallace
Life of this patent
Estimating the term…
Abstract
An electrical network configured to suppress voltage transients is disclosed. The network includes a capacitor and an electrical impedance in parallel with a diode. The capacitor is in series with the parallel connected diode and electrical impedance, and the electrical network is configured to suppress voltage transients occurring across the series combination of the capacitor and the parallel connected diode and electrical impedance.
Claims12
A Z source network, comprising:
- positive and negative input terminals;
- a shunt capacitor connected to the positive and negative input terminals;
- a diode having an anode connected to the positive input terminal and a cathode connected to an internal node of the Z source network;
- positive and negative output terminals;
- a first inductor connected to the inner node and to the positive output terminal;
- a first capacitor connected to the inner node and to the negative output terminal;
- a second inductor connected to the negative input terminal and to the negative output terminal;
- a second capacitor connected to the negative input terminal and the positive output terminal;
- and
- an electrical network configured to suppress voltage transients, the electrical network comprising:
- a capacitor;
- and
- an electrical impedance in parallel with a diode, wherein the capacitor is in series with the parallel connected diode and electrical impedance,
- wherein the electrical network is configured to suppress voltage transients occurring across the positive and negative input terminals.
11 more elements
A Z source network, comprising:
- positive and negative input terminals;
- a shunt capacitor connected to the positive and negative input terminals;
- a diode having an anode connected to the positive input terminal and a cathode connected to an internal node of the Z source network;
- positive and negative output terminals;
- a first inductor connected to the inner node and to the positive output terminal;
- a first capacitor connected to the inner node and to the negative output terminal;
- a second inductor connected to the negative input terminal and to the negative output terminal;
- a second capacitor connected to the negative input terminal and the positive output terminal;
- and
- an electrical network configured to suppress voltage transients, the electrical network comprising:
- a first capacitor;
- an electrical impedance in parallel with a diode, wherein the first capacitor is in series with the parallel connected diode and electrical impedance;
- and
- second and third capacitors, wherein the second and third capacitors are in series with the first capacitor and the parallel connected diode and electrical impedance,
- wherein the electrical network is configured to suppress voltage transients occurring across the positive and negative output terminals.
12 more elements
Dependencies are inferred from the claim text.