RRAM device

A method of forming an integrated circuit device including an RRAM cell, comprising:

• forming a lower inter-level dielectric (ILD) layer over a substrate;
• forming a spacer material over the substrate;
• forming a bottom electrode extending through the spacer material to an upper surface of a metal layer within the lower ILD layer;
• forming a resistance switching layer over the bottom electrode and a top electrode over the resistance switching layer;
• and
• forming a spacer using the spacer material to cover sidewalls of the resistance switching layer and the top electrode.

A method of forming an integrated circuit device including an RRAM cell, comprising:

• forming a lower inter-level dielectric (ILD) layer over a substrate;
• forming a bottom etch stop material overlying the lower ILD layer;
• forming a spacer material over the bottom etch stop material;
• forming a bottom electrode extending through the spacer material and the bottom etch stop material to an upper surface of a metal layer within the lower ILD layer;
• forming a resistance switching material over the bottom electrode, and a top metal material over the resistance switching material;
• patterning the top metal material and the resistance switching material to form a top electrode and the a resistance switching layer having a variable resistance, the top electrode and the resistance switching layer having sidewalls vertically aligned with one another;
• and
• sputter etching the spacer material that is not covered by the resistance switching layer to dislodge atoms of the spacer material, which are subsequently re-deposited onto the sidewalls of the resistance switching layer and the top electrode to form a spacer covering the sidewalls of the resistance switching layer and the top electrode.