Polysilicon thin-film transistor array substrate and method for preparing the same, and display device

A method for preparing a polysilicon thin-film transistor array substrate including (i) a gate electrode, (ii) a gate insulating layer, (iii) a semiconductor layer, (iv) a source electrode and a drain electrode of a polysilicon thin-film transistor, (v) a first electrode and a second electrode of a storage capacitor, (vi) a gate line, and (vii) a data line, the method comprising:

• forming the semiconductor layer and the first electrode of the storage capacitor via a one-time patterning process;
• forming the gate insulating layer on the semiconductor layer and the first electrode of the storage capacitor;
• forming the gate electrode, the gate line, and the second electrode of the storage capacitor on the gate insulating layer via a one-time patterning process;
• forming a second insulating layer on the gate electrode, the gate line, and the second electrode of the storage capacitor, and forming a via hole that passes through the gate insulating layer and the second insulating layer;
• and
• forming the source electrode, the drain electrode, and the data line on the second insulating layer via a one-time patterning process,
• wherein the source electrode and the drain electrode contact the semiconductor layer by the via hole, and
• wherein forming the semiconductor layer and the first electrode of the storage capacitor comprises:
• forming a polysilicon semiconductor film;
• forming a first insulating film on the polysilicon semiconductor film;
• coating a photoresist on the first insulating film;
• exposing and developing the photoresist via a graytone or halftone mask plate to form a photoresist completely-reserved region, a photoresist half-reserved region, and a photoresist completely-removed region, wherein the photoresist completely-reserved region corresponds to a semiconductor layer region, the photoresist half-reserved region corresponds to a storage capacitor region, and the photoresist completely-removed region corresponds to other regions;
• removing the polysilicon semiconductor film and the first insulating film in the photoresist completely-removed region via an etching process;
• removing the photoresist in the photoresist half-reserved region via an ashing process;
• removing the first insulating film in the photoresist half-reserved region via an etching process to define a first insulating layer;
• and
• performing a first ion doping operation by taking the first insulating film above the semiconductor layer region as a first mask, and performing an annealing process to make the polysilicon semiconductor film in the storage capacitor region as a conductor and form a first electrode of the storage capacitor, wherein the polysilicon semiconductor film in the semiconductor layer region is protected by the first insulating film when performing the first ion doping operation, such that the polysilicon semiconductor film in the semiconductor layer region remains a semiconductor.

A method for preparing a polysilicon thin-film transistor array substrate including (i) a gate electrode, (ii) a gate insulating layer, (iii) a semiconductor layer, (iv) a source electrode and a drain electrode of a polysilicon thin-film transistor, (v) a first electrode and a second electrode of a storage capacitor, (vi) a gate line, and (vii) a data line, the method comprising:

• forming the gate electrode, the gate line, and the second electrode of the storage capacitor via a one-time patterning process;
• forming the gate insulating layer on the gate electrode, the gate line and the second electrode of the storage capacitor;
• forming the semiconductor layer and the first electrode of the storage capacitor on the gate insulating layer via a one-time patterning process;
• forming a second insulating layer on the semiconductor layer and the first electrode of the storage capacitor, and forming a via hole that passes through the second insulating layer;
• and
• forming the source electrode, the drain electrode, and the data line on the second insulating layer via a one-time patterning process,
• wherein the source electrode and the drain electrode contact the semiconductor layer by the via hole on the second insulating layer, and
• wherein forming the semiconductor layer and the first electrode of the storage capacitor comprises:
• forming a polysilicon semiconductor film;
• forming a first insulating film on the polysilicon semiconductor film;
• coating a photoresist on the first insulating film;
• exposing and developing the photoresist via a graytone or halftone mask plate to form a photoresist completely-reserved region, a photoresist half-reserved region, and a photoresist completely-removed region, wherein the photoresist completely-reserved region corresponds to a semiconductor layer region, the photoresist half-reserved region corresponds to a storage capacitor region, and the photoresist completely-removed region corresponds to other regions;
• removing the polysilicon semiconductor film and the first insulating film in the photoresist completely-removed region via an etching process;
• removing the photoresist in the photoresist half-reserved region via an ashing process;
• removing the first insulating film in the photoresist half-reserved region via an etching process to define a first insulating layer;
• and
• performing an ion doping operation by taking the first insulating film above the semiconductor layer region as a mask, and performing an annealing process to make the polysilicon semiconductor film in the storage capacitor region as a conductor and form a first electrode of the storage capacitor,
• wherein the polysilicon semiconductor film in the semiconductor layer region is protected by the first insulating film when performing the ion doping operation, such that the polysilicon semiconductor film in the semiconductor layer region remains a semiconductor.