Methods of manufacturing FINFET semiconductor devices using sacrificial gate patterns and selective oxidization of a fin
AssigneeSamsung Electronics Co., Ltd.
InventorsSungmin Kim, Sung-Dae Suk, Jaehoo Park, Dongho Cha, Daewon Ha
Life of this patent
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Abstract
A method of manufacturing a semiconductor device includes patterning a substrate to form an active fin, forming a sacrificial gate pattern crossing over the active fin on the substrate, forming an interlayer insulating layer on the sacrificial gate pattern, removing the sacrificial gate pattern to form a gap region exposing the active fin in the interlayer insulating layer, and oxidizing a portion of the active fin exposed by the gap region to form an insulation pattern between the active fin and the substrate.
Claims16
A method of manufacturing a semiconductor device, the method comprising:
- patterning a semiconductor substrate to form an active pattern;
- forming oxidation reducing spacers on upper sidewalls of the active pattern;
- forming device isolation patterns spaced apart from bottom surfaces of the oxidation reducing spacers, the device isolation patterns exposing portions of lower sidewalls of the active pattern;
- forming a dummy gate pattern crossing over the active pattern and the oxidation reducing spacers, the dummy gate pattern being in direct contact with the active pattern between the device isolation pattern and the oxidation reducing spacers;
- forming protecting spacers on both sidewalls of the dummy gate pattern, the protecting spacers comprising a material having an etch selectivity with respect to the oxidation reducing spacers;
- removing the dummy gate pattern to form a gate region exposing lower sidewalls of the active pattern between the protecting spacers;
- oxidizing the lower sidewalls of the active pattern exposed by the gate region to form a local insulation pattern in the active pattern;
- and
- forming a gate electrode in the gate region.
A method of manufacturing a semiconductor device, the method comprising:
- patterning a semiconductor substrate to form an active pattern;
- forming oxidation reducing spacers on upper sidewalls of the active pattern;
- forming a dummy gate pattern crossing over the active pattern and the oxidation reducing spacers;
- forming protecting spacers on both sidewalls of the dummy gate pattern, the protecting spacers comprising a material having an etch selectivity with respect to the oxidation reducing spacers;
- forming sidewall spacers on sidewalls of the protecting spacers, the sidewall spacers comprising a different insulating material from the protecting spacers;
- forming an interlayer insulating layer on the semiconductor substrate to cover the sidewall spacers and to expose a top surface of the dummy gate pattern;
- removing the dummy gate pattern to form a gate region exposing lower sidewalls of the active pattern between the protecting spacers;
- oxidizing the lower sidewalls of the active pattern exposed by the gate region to form a local insulation pattern in the active pattern;
- and
- forming a gate electrode in the gate region.
A method of manufacturing a semiconductor device, the method comprising:
- patterning a semiconductor substrate to form an active pattern;
- forming oxidation reducing spacers on upper sidewalls of the active pattern;
- forming a dummy gate pattern crossing over the active pattern and the oxidation reducing spacers;
- forming protecting spacers on both sidewalls of the dummy gate pattern, the protecting spacers comprising a material having an etch selectivity with respect to the oxidation reducing spacers;
- removing the dummy gate pattern to form a gate region exposing lower sidewalls of the active pattern between the protecting spacers;
- oxidizing the lower sidewalls of the active pattern exposed by the gate region to form a local insulation pattern in the active pattern, a first height of the local insulation pattern under the oxidation reducing spacer being greater than a second height of the local insulation layer under the active pattern between the protecting spacers;
- and
- forming a gate electrode in the gate region.
Dependencies are inferred from the claim text.