Method of producing a III-V fin structure
AssigneesImec Vzw, Sony Corporation
InventorsHideki Minari, Shinichi Yoshida, Geoffrey Pourtois, Matty Caymax, Eddy Simoen
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AssigneesImec Vzw, Sony Corporation
InventorsHideki Minari, Shinichi Yoshida, Geoffrey Pourtois, Matty Caymax, Eddy Simoen
Estimating the term…
A method of producing a III-V fin structure within a gap separating shallow trench isolation (STI) structures and exposing a semiconductor substrate is disclosed, the method comprising providing a semiconductor substrate, providing in the semiconductor substrate at least two identical STI structures separated by a gap exposing the semiconductor substrate, wherein said gap is bounded by said at least two identical STI structures, and, producing a III-V fin structure within said gap on the exposed semiconductor substrate, and providing a diffusion barrier at least in contact with each side wall of said at least two identical STI structures and with side walls of said III-V fin structure and wherein said semiconductor substrate is a Si substrate.
A method for producing a III-V fin structure within a gap separating shallow trench isolation (STI) structures and exposing a semiconductor substrate, the method comprising:
A semiconductor structure comprising:
Dependencies are inferred from the claim text.