Semiconductor device and method
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHong-Lin Chen, Shih-Cheng Chen, Ming-Shan Shieh, Chin-Chi Wang, Wai-Yi Lien, Chih-Hao Wang
Life of this patent
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Abstract
Vertical gate all around devices are formed by initially forming a first doped region and a second doped region that are planar with each other. A channel layer is formed over the first doped region and the second doped region, and a third doped region is formed over the channel layer. A fourth doped region is formed to be planar with the third doped region, and the first doped region, the second doped region, the third doped region, the fourth doped region, and the channel layer are patterned to form a first nanowire and a second nanowire, which are then used to form the vertical gate all around devices.
Claims20
A method of manufacturing a semiconductor device, the method comprising:
- forming a first opening in a semiconductor substrate;
- epitaxially growing a first semiconductor material within the first opening;
- planarizing the first semiconductor material with the semiconductor substrate;
- forming a second opening in the first semiconductor material;
- epitaxially growing a second semiconductor material within the second opening;
- planarizing the second semiconductor material with the first semiconductor material;
- and
- epitaxially growing a channel layer over the first semiconductor material and the second semiconductor material.
A method of manufacturing a semiconductor device, the method comprising:
- embedding a dielectric material into a semiconductor substrate;
- embedding a first semiconductor material within the semiconductor substrate, wherein the embedding the first semiconductor material is performed at least in part using a first epitaxial growth process;
- embedding a second semiconductor material into the semiconductor substrate, wherein the embedding the second semiconductor material is performed at least in part using a second epitaxial growth process different from the first epitaxial growth process and wherein the second semiconductor material is planar with the first semiconductor material;
- and
- epitaxially growing a channel layer onto the first semiconductor material and the second semiconductor material, wherein at least a portion of the channel layer extends over the dielectric material.
A method of manufacturing a semiconductor device, the method comprising:
- depositing a first mask layer onto a semiconductor substrate;
- using the first mask layer to pattern a first opening into the semiconductor substrate;
- filling the first opening with a first epitaxial material using at least in part a first epitaxial growth process;
- depositing a second mask layer onto the first epitaxial material;
- using the second mask layer to pattern a second opening into the first epitaxial material;
- filling the second opening with a second epitaxial material using at least in part a second epitaxial growth process;
- growing a channel material on the first epitaxial material and the second epitaxial material using at least in part a third epitaxial growth process;
- growing a third epitaxial material onto the channel material using at least in part a fourth epitaxial growth process;
- depositing a third mask layer onto the third epitaxial material;
- using the third mask layer to pattern a third opening into the third epitaxial material;
- filling the third opening with a fourth epitaxial material using at least in part a fifth epitaxial growth process;
- and
- patterning the third epitaxial material, the fourth epitaxial material, and the channel material to form a plurality of nanowires.
Dependencies are inferred from the claim text.