Integrated circuit device having defined gate spacing and method of designing and fabricating thereof

An integrated circuit device, comprising:

• a first gate structure having a first side and a second side,
• the first side having a first length (W),
• the second side having a second length (L),
• wherein the first length (W) is greater than the second length (L),
• wherein W and L are provided in a unit of microns;
• a second gate structure disposed adjacent to the first gate structure;
• and
• a spacing between the first gate structure and the second gate structure in a direction substantially parallel to the second side, the spacing having a distance that is greater than (√{square root over (W*W+L*L)})/10.

An integrated circuit, comprising:

• a first gate structure having a first side of a first length (W) and a second side of a second length (L), the first length (W) being greater than the second length (L), wherein W and L are provided in a unit of microns;
• and
• a second gate structure spaced a first distance in a direction substantially parallel to the second side from the first gate structure, wherein the first distance is greater than (√{square root over (W*W+L*L)})/10, wherein the second gate structure is adjacent to the first gate structure;
• and
• a third gate structure spaced a second distance in the direction substantially parallel to the second side from the first gate structure, wherein the third gate structure is smaller than the first gate structure and the second gate structure, and wherein the second distance is less than the first distance.